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Fuses (view source)

Revision as of 22:46, 22 November 2019

1,481 bytes added ,  22:46, 22 November 2019
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   −
This register takes the address of the fuse to be read/written/sensed.
+
Takes the address of the fuse to be read/written/sensed.
    
==== FUSE_FUSERDATA ====
 
==== FUSE_FUSERDATA ====
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|}
 
|}
   −
This register receives the value read from the fuse.
+
Returns the value read from the fuse.
    
==== FUSE_FUSEWDATA ====
 
==== FUSE_FUSEWDATA ====
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|}
 
|}
   −
This register takes the value to be written to the fuse.
+
Takes the value to be written to the fuse.
    
==== FUSE_FUSETIME_RD1 ====
 
==== FUSE_FUSETIME_RD1 ====
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| FUSE_FUSETIME_RD1_THR_MAX
 
| FUSE_FUSETIME_RD1_THR_MAX
 
|}
 
|}
 +
 +
Controls the [[#FUSE_FUSECTRL|STATE_READ_SETUP]] (TSUR_MAX), [[#FUSE_FUSECTRL|STATE_READ_STROBE]] (TSUR_FUSEOUT) and [[#FUSE_FUSECTRL|STATE_READ_HOLD]] (THR_MAX) times.
    
==== FUSE_FUSETIME_RD2 ====
 
==== FUSE_FUSETIME_RD2 ====
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| FUSE_FUSETIME_RD2_TWIDTH_RD
 
| FUSE_FUSETIME_RD2_TWIDTH_RD
 
|}
 
|}
 +
 +
Controls [[#FUSE_FUSECTRL|STATE_SAMPLE_FUSES]] (TWIDTH_RD) time.
    
==== FUSE_FUSETIME_PGM1 ====
 
==== FUSE_FUSETIME_PGM1 ====
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| FUSE_FUSETIME_PGM1_THP_PS
 
| FUSE_FUSETIME_PGM1_THP_PS
 
|}
 
|}
 +
 +
Controls the [[#FUSE_FUSECTRL|STATE_WRITE_SETUP]] (TSUP_MAX), [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_SETUP]] (TSUP_ADDR), [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_HOLD]] (THP_ADDR) and [[#FUSE_FUSECTRL|STATE_FUSE_SRC_HOLD]] (THP_PS) times.
    
==== FUSE_FUSETIME_PGM2 ====
 
==== FUSE_FUSETIME_PGM2 ====
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| FUSE_FUSETIME_PGM2_THP_CSPS
 
| FUSE_FUSETIME_PGM2_THP_CSPS
 
|}
 
|}
 +
 +
Controls the [[#FUSE_FUSECTRL|STATE_WRITE_PROGRAM]] (TWIDTH_PGM), [[#FUSE_FUSECTRL|STATE_FUSE_SRC_SETUP]] (TSUP_PS) and [[#FUSE_FUSECTRL|STATE_READ_BEFORE_WRITE_SETUP]] (THP_CSPS) times.
    
==== FUSE_PRIV2INTFC_START ====
 
==== FUSE_PRIV2INTFC_START ====
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| FUSE_PRIV2INTFC_SKIP_RECORDS
 
| FUSE_PRIV2INTFC_SKIP_RECORDS
 
|}
 
|}
 +
 +
Controls the interface between the internal fuse chip (INTFC) and the fuse cache registers (PRIV).
    
==== FUSE_FUSEBYPASS ====
 
==== FUSE_FUSEBYPASS ====
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|}
 
|}
   −
If set, this register enables fuse bypass mode. This is only available in hardware where the [[#Bitmap|bypass_fuses]] fuse remains unburnt.
+
If set, this register enables fuse bypass mode. This is only available in hardware where the [[#Bitmap|production_mode]] fuse remains unburnt.
    
==== FUSE_PRIVATEKEYDISABLE ====
 
==== FUSE_PRIVATEKEYDISABLE ====
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|}
 
|}
   −
If set, this register hides the [[#Bitmap|private_key]] fuses.
+
If set, this register hides the [[#Bitmap|private_key]] fuses until the next reset.
    
==== FUSE_DISABLEREGPROGRAM ====
 
==== FUSE_DISABLEREGPROGRAM ====
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|}
 
|}
   −
If set, this register disables fuse programming.
+
If set, this register disables fuse programming until the next reset.
    
==== FUSE_WRITE_ACCESS_SW ====
 
==== FUSE_WRITE_ACCESS_SW ====
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|}
 
|}
   −
If set, this register makes the fuse driver registers read-only.
+
Controls and returns the status of software writes to the fuse cache registers.
    
==== FUSE_PWR_GOOD_SW ====
 
==== FUSE_PWR_GOOD_SW ====
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| FUSE_PRIV2RESHIFT_STATUS_1_SL2_TBANK_VAL
 
| FUSE_PRIV2RESHIFT_STATUS_1_SL2_TBANK_VAL
 
|}
 
|}
 +
 +
Controls and returns the status of the RESHIFT hardware block used in RAM repair.
    
==== FUSE_FUSETIME_RD3 ====
 
==== FUSE_FUSETIME_RD3 ====
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| FUSE_FUSETIME_RD3_TSUR_PDCS
 
| FUSE_FUSETIME_RD3_TSUR_PDCS
 
|}
 
|}
 +
 +
Controls the [[#FUSE_FUSECTRL|STATE_READ_DEASSERT_PD]] (TSUR_PDCS) time.
    
==== FUSE_PRIVATE_KEY0_NONZERO ====
 
==== FUSE_PRIVATE_KEY0_NONZERO ====
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| FUSE_PRIVATE_KEY0_NONZERO_DATA
 
| FUSE_PRIVATE_KEY0_NONZERO_DATA
 
|}
 
|}
 +
 +
Returns whether [[#Bitmap|private_key0]] is empty or not.
    
==== FUSE_PRIVATE_KEY1_NONZERO ====
 
==== FUSE_PRIVATE_KEY1_NONZERO ====
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| FUSE_PRIVATE_KEY1_NONZERO_DATA
 
| FUSE_PRIVATE_KEY1_NONZERO_DATA
 
|}
 
|}
 +
 +
 +
Returns whether [[#Bitmap|private_key1]] is empty or not.
    
==== FUSE_PRIVATE_KEY2_NONZERO ====
 
==== FUSE_PRIVATE_KEY2_NONZERO ====
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| FUSE_PRIVATE_KEY2_NONZERO_DATA
 
| FUSE_PRIVATE_KEY2_NONZERO_DATA
 
|}
 
|}
 +
 +
Returns whether [[#Bitmap|private_key2]] is empty or not.
    
==== FUSE_PRIVATE_KEY3_NONZERO ====
 
==== FUSE_PRIVATE_KEY3_NONZERO ====
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| FUSE_PRIVATE_KEY3_NONZERO_DATA
 
| FUSE_PRIVATE_KEY3_NONZERO_DATA
 
|}
 
|}
 +
 +
Returns whether [[#Bitmap|private_key3]] is empty or not.
    
==== FUSE_PRIVATE_KEY4_NONZERO ====
 
==== FUSE_PRIVATE_KEY4_NONZERO ====
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| FUSE_PRIVATE_KEY4_NONZERO_DATA
 
| FUSE_PRIVATE_KEY4_NONZERO_DATA
 
|}
 
|}
 +
 +
Returns whether [[#Bitmap|private_key4]] is empty or not.
    
=== Cache registers ===
 
=== Cache registers ===
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| aid
 
| aid
 
| 103
 
| 103
 +
| None
 +
| 0-31
 +
|-
 +
| ramrepair_record0
 +
| 104
 +
| None
 +
| 0-31
 +
|-
 +
| ramrepair_record1
 +
| 105
 +
| None
 +
| 0-31
 +
|-
 +
| ramrepair_record2
 +
| 106
 +
| None
 +
| 0-31
 +
|-
 +
| ramrepair_record3
 +
| 107
 +
| None
 +
| 0-31
 +
|-
 +
| ramrepair_record4
 +
| 108
 +
| None
 +
| 0-31
 +
|-
 +
| ramrepair_record5
 +
| 109
 
| None
 
| None
 
| 0-31
 
| 0-31
Retrieved from "https://switchbrew.org/wiki/Special:MobileDiff/8385"