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=== FALCON_EXCI ===
=== FALCON_EXCI ===
{| class="wikitable" border="1"
! Bits
! Description
|-
| 0-19
| PC that originated the exception
|-
| 20-23
| Exception type
0x00: Trap 0
0x01: Trap 1
0x02: Trap 2
0x03: Trap 3
0x08: Invalid opcode
0x09: Authentication failure
0x0A: Page fault (no hit)
0x0B: Page fault (multi hit)
0x0F: Breakpoint
|}
Contains information about raised exceptions.
Contains information about raised exceptions.
|-
|-
| 6
| 6
| FALCON_CPUCTL_START_SCP_LS
| FALCON_CPUCTL_STARTCPU_SECURE
|}
|}
|}
|}
=== TSEC_MCCIF_FIFOCTRL1 ===
=== TSEC_TFBIF_MCCIF_FIFOCTRL1 ===
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Bits
! Bits
Used to control accesses to DRAM.
Used to control accesses to DRAM.
[6.0.0+] The nvhost_tsec firmware sets this register to (data_size << 4) before reading memory from the GPU UCODE carveout.
[6.0.0+] The nvhost_tsec firmware sets this register to 0x20 or 0x140 before reading memory from the GPU UCODE carveout.
=== TSEC_DMA_CMD ===
=== TSEC_DMA_CMD ===