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Line 127:
Line 127:
| 0x4D || svcSleepSystem || ||
| 0x4D || svcSleepSystem || ||
|-
|-
−| 0x4E || svcReadWriteRegister || ||
+| 0x4E || [[#svcReadWriteRegister]] || X1=reg_addr, W2=rw_mask, W3=in_val || W0=result, W1=out_val
|-
|-
| 0x4F || svcSetProcessActivity || ||
| 0x4F || svcSetProcessActivity || ||
Line 315:
Line 315:
|-
|-
| Process || 18 || 0 || Title-id, introduced with [[3.0.0]]
| Process || 18 || 0 || Title-id, introduced with [[3.0.0]]
+|}
+
+== svcReadWriteRegister ==
+Read/write Tegra hardware registers.
+rw_mask is 0 for reading and -1 for writing.
+
+=== Registers ===
+{| class=wikitable
+! Address || Description
+|-
+| 0x700192E8 ||
+|-
+| 0x700192EC ||
+|-
+| 0x700192F0 ||
+|-
+| 0x700192F4 ||
+|-
+| 0x700192F8 ||
+|-
+| 0x7001941C ||
+|-
+| 0x70019420 ||
+|-
+| 0x70019424 ||
+|-
+| 0x70019428 ||
+|-
+| 0x7001942C ||
+|-
+| 0x70019430 ||
+|-
+| 0x7001944C ||
+|-
+| 0x7001947C ||
+|-
+| 0x70019480 ||
+|-
+| 0x70019484 ||
+|-
+| 0x7001950C ||
+|-
+| 0x70019670 ||
+|-
+| 0x70019674 ||
+|-
+| 0x70019690 ||
+|-
+| 0x70019694 ||
+|-
+| 0x70019698 ||
+|-
+| 0x7001969C ||
+|-
+| 0x700196A0 ||
+|-
+| 0x700196A4 ||
+|-
+| 0x70019C5C ||
|}
|}