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4,202 bytes added ,  19:03, 24 September 2022
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Line 6: Line 6:  
| 0xB1C0 || 1 || [[#MAXWELL_COMPUTE_B|MAXWELL_COMPUTE_B]]
 
| 0xB1C0 || 1 || [[#MAXWELL_COMPUTE_B|MAXWELL_COMPUTE_B]]
 
|-
 
|-
| 0xA140 || 2 || KEPLER_INLINE_TO_MEMORY_B
+
| 0xA140 || 2 || [[#KEPLER_INLINE_TO_MEMORY_B|KEPLER_INLINE_TO_MEMORY_B]]
 
|-
 
|-
 
| 0x902D || 3 || [[#FERMI_TWOD_A|FERMI_TWOD_A]]
 
| 0x902D || 3 || [[#FERMI_TWOD_A|FERMI_TWOD_A]]
Line 116: Line 116:  
|-
 
|-
 
| 0x87 || InvalidateShaderCaches || 1 || bitfield ||
 
| 0x87 || InvalidateShaderCaches || 1 || bitfield ||
 +
|- style="border-top: double"
 +
| 0xB0 || || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 
| 0xB2 || IncrementSyncPoint || 1 || ||
 
| 0xB2 || IncrementSyncPoint || 1 || ||
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|-
 
|-
 
| 0x1D3 || SetAlphaFraction || 1 || || GpuInit writes 0x3f here.
 
| 0x1D3 || SetAlphaFraction || 1 || || GpuInit writes 0x3f here.
 +
|-
 +
| 0x1D4 || || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 
| 0x1D5 || SetHybridAntiAliasControl || 1 || bitfield || Bit0-3: ?, bit4: Enable
 
| 0x1D5 || SetHybridAntiAliasControl || 1 || bitfield || Bit0-3: ?, bit4: Enable
 +
|-
 +
| 0x1D6 || || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 +
| 0x1D8 || || 1 || ||
 +
|-
 +
| 0x1D9 || || 1 || ||
 +
|-
 +
| 0x1DA || || 1 || ||
 +
|-
 +
| 0x1DB || || 1 || ||
 +
|-
 +
| 0x1DC || || 1 || ||
 +
|-
 +
| 0x1DD || || 1 || ||
 +
|-
 +
| 0x1DE || || 1 || ||
 +
|-
 
| 0x1DF || SetShaderLocalMemoryWindow || 1 || uint ||
 
| 0x1DF || SetShaderLocalMemoryWindow || 1 || uint ||
|- style="border-top: double"
+
|-
 +
| 0x1E0 || || 1 || ||
 +
|-
 +
| 0x1E1 || || 1 || ||
 +
|-
 +
| 0x1E2 || || 1 || ||
 +
|-
 +
| 0x1E3 || || 1 || ||
 +
|-
 
| 0x1E4 || SetShaderLocalMemoryA || 1 || ||
 
| 0x1E4 || SetShaderLocalMemoryA || 1 || ||
 
|-
 
|-
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|-
 
|-
 
| 0x1F3 || SetZcullRegionPixelOffsetC || 1 || || SetRenderTargets optionally writes 0 here.
 
| 0x1F3 || SetZcullRegionPixelOffsetC || 1 || || SetRenderTargets optionally writes 0 here.
|- style="border-top: double"
+
|-
 +
| 0x1F4 || || 1 || ||
 +
|-
 +
| 0x1F5 || || 1 || ||
 +
|-
 +
| 0x1F6 || || 1 || ||
 +
|-
 
| 0x1F7 || SetCullBeforeFetch || 1 || ||
 
| 0x1F7 || SetCullBeforeFetch || 1 || ||
 
|-
 
|-
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| 0x3D7 || SetBackStencilFuncMask || 1 || ||
 
| 0x3D7 || SetBackStencilFuncMask || 1 || ||
 
|-
 
|-
| 0x3D8 || TiledCacheAction0 || 1 || bool || Trigger?
+
| 0x3D8 || SetTiledCache || 1 || bool || Trigger?
 +
|-
 +
| 0x3D9 || SetTiledCacheTileSize || 1 || bitfield || Bit0-15: ?, bit16-31: ?
 
|-
 
|-
| 0x3D9 || TiledCacheTileSize || 1 || bitfield || Bit0-15: ?, bit16-31: ?
+
| 0x3DA || || 1 || ||  
|- style="border-top: double"
  −
| 0x3DE || DiscardTrigger || 1 || bitfield || Bit4-6: DiscardColorIndex, bit0: DiscardDepthStencil
  −
|- style="border-top: double"
  −
| 0x3E0 || TiledCacheAction1 || 1 || bool || Trigger?
   
|-
 
|-
| 0x3E1 || SetVertexStreamSubstituteA || 1 || ||
+
| 0x3DB || || 1 || ||  
 
|-
 
|-
| 0x3E2 || SetVertexStreamSubstituteB || 1 || ||
+
| 0x3DC || || 1 || ||  
 
|-
 
|-
| 0x3E3 || SetLineModePolygonClip || 1 || ||
+
| 0x3DD || || 1 || ||  
 
|-
 
|-
| 0x3E4 || SetSingleCtWriteControl || 1 || ||
+
| 0x3DE || TiledCacheInvalidate || 1 || bitfield || Bit4-6: DiscardColorIndex, bit0: DiscardDepthStencil
 +
|-
 +
| 0x3DF || || 1 || ||
 +
|-
 +
| 0x3E0 || TiledCacheFlush || 1 || bool || Trigger?
 +
|-
 +
| 0x3E1 || SetVertexStreamSubstituteA || 1 || ||
 +
|-
 +
| 0x3E2 || SetVertexStreamSubstituteB || 1 || ||
 +
|-
 +
| 0x3E3 || SetLineModePolygonClip || 1 || ||
 +
|-
 +
| 0x3E4 || SetSingleCtWriteControl || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 
| 0x3E6 || SetVtgWarpWatermarks || 1 || ||
 
| 0x3E6 || SetVtgWarpWatermarks || 1 || ||
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| 0x40C+N || SetTirModulationCoefficientTable || 4 || float[4] ||
 
| 0x40C+N || SetTirModulationCoefficientTable || 4 || float[4] ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 +
| 0x410 || || 1 || ||
 +
|-
 
| 0x411 || SetSpareNoop01 || 1 || ||
 
| 0x411 || SetSpareNoop01 || 1 || ||
 
|-
 
|-
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|-
 
|-
 
| 0x41F || SetSpareNoop15 || 1 || ||
 
| 0x41F || SetSpareNoop15 || 1 || ||
|- style="border-top: double"
+
|-
 +
| 0x420 || || 1 || ||
 +
|-
 +
| 0x421 || || 1 || ||
 +
|-
 +
| 0x422 || || 1 || ||
 +
|-
 +
| 0x423 || || 1 || ||
 +
|-
 +
| 0x424 || || 1 || ||
 +
|-
 +
| 0x425 || || 1 || ||
 +
|-
 +
| 0x426 || || 1 || ||
 +
|-
 +
| 0x427 || || 1 || ||
 +
|-
 +
| 0x428 || || 1 || ||
 +
|-
 +
| 0x429 || || 1 || ||
 +
|-
 +
| 0x42A || || 1 || ||
 +
|-
 +
| 0x42B || || 1 || ||
 +
|-
 
| 0x42C || SetReservedSwMethod03 || 1 || ||
 
| 0x42C || SetReservedSwMethod03 || 1 || ||
 
|-
 
|-
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|-
 
|-
 
| 0x441 || SetReservedSwMethod15 || 1 || ||
 
| 0x441 || SetReservedSwMethod15 || 1 || ||
|- style="border-top: double"
+
|-
 +
| 0x442 || || 1 || ||
 +
|-
 
| 0x443 || NoOperationDataHi || 1 || ||
 
| 0x443 || NoOperationDataHi || 1 || ||
 
|-
 
|-
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|-
 
|-
 
| 0x47F || DecompressZetaSurface || 1 || trigger || 1 is written here to trigger.
 
| 0x47F || DecompressZetaSurface || 1 || trigger || 1 is written here to trigger.
 +
|-
 +
| 0x480 || || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 
| 0x482 || SetZtSparse || 1 || ||
 
| 0x482 || SetZtSparse || 1 || ||
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| 0x509 || SetGlobalBaseInstanceIndex || 1 || ||
 
| 0x509 || SetGlobalBaseInstanceIndex || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 +
| 0x511 || || 1 || ||
 +
|-
 +
| 0x512 || || 1 || ||
 +
|-
 +
| 0x513 || || 1 || ||
 +
|-
 
| 0x514 || SetPsWarpWatermarks || 1 || ||
 
| 0x514 || SetPsWarpWatermarks || 1 || ||
 
|-
 
|-
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| 0x569 || SetBackStencilFunc || 1 || ||
 
| 0x569 || SetBackStencilFunc || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
| 0x56D || CsaaEnable || 1 || bool ||
+
| 0x56D || SetCsaa || 1 || bool ||
 
|-
 
|-
 
| 0x56E || SetSrgbWrite || 1 || ||
 
| 0x56E || SetSrgbWrite || 1 || ||
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|-
 
|-
 
| 0x680+N || SetCtWrite || 8 || ||
 
| 0x680+N || SetCtWrite || 8 || ||
 +
|- style="border-top: double"
 +
| 0x689 || || 1 || ||
 
|- style="border-top: double"
 
|- style="border-top: double"
 
| 0x68B || PipeNop || 1 || trigger || Always 0 is written here. During zcull ctx-save, spammed when enabling raster, ...
 
| 0x68B || PipeNop || 1 || trigger || Always 0 is written here. During zcull ctx-save, spammed when enabling raster, ...
Line 1,615: Line 1,697:  
|- style="border-top: double"
 
|- style="border-top: double"
 
| 0xD00 || SetMmeShadowScratch || 8 || ||
 
| 0xD00 || SetMmeShadowScratch || 8 || ||
 +
|}
 +
 +
= KEPLER_INLINE_TO_MEMORY_B =
 +
{| class=wikitable
 +
! Register || Name || Size || Type || Notes
 +
|-
 +
| 0x0 || SetObject || 1 || bitfield || Bit0-15: ClassId, bit16-20: EngineId
 +
|- style="border-top: double"
 +
| 0x40 || NoOperation || 1 || ||
 +
|-
 +
| 0x41 || SetNotifyA || 1 || gpuva ||
 +
|-
 +
| 0x42 || SetNotifyB || 1 || gpuva ||
 +
|-
 +
| 0x43 || Notify || 1 || || 0=WriteOnly, 1=WriteThenAwaken
 +
|-
 +
| 0x44 || WaitForIdle || 1 || ||
 +
|- style="border-top: double"
 +
| 0x4C || SetGlobalRenderEnableA || 1 || ||
 +
|-
 +
| 0x4D || SetGlobalRenderEnableB || 1 || ||
 +
|-
 +
| 0x4E || SetGlobalRenderEnableC || 1 || ||
 +
|-
 +
| 0x4F || SendGoIdle || 1 || ||
 +
|-
 +
| 0x50 || PmTrigger || 1 || ||
 +
|-
 +
| 0x51 || PmTriggerWfi || 1 || ||
 +
|- style="border-top: double"
 +
| 0x54 || SetInstrumentationMethodHeader || 1 || ||
 +
|-
 +
| 0x55 || SetInstrumentationMethodData || 1 || ||
 +
|- style="border-top: double"
 +
| 0x60 || LineLengthIn || 1 || ||
 +
|-
 +
| 0x61 || LineCount || 1 || ||
 +
|-
 +
| 0x62 || OffsetOutUpper || 1 || ||
 +
|-
 +
| 0x63 || OffsetOut || 1 || ||
 +
|-
 +
| 0x64 || PitchOut || 1 || ||
 +
|-
 +
| 0x65 || SetDstBlockSize || 1 || ||
 +
|-
 +
| 0x66 || SetDstWidth || 1 || ||
 +
|-
 +
| 0x67 || SetDstHeight || 1 || ||
 +
|-
 +
| 0x68 || SetDstDepth || 1 || ||
 +
|-
 +
| 0x69 || SetDstLayer || 1 || ||
 +
|-
 +
| 0x6A || SetDstOriginBytesX || 1 || ||
 +
|-
 +
| 0x6B || SetDstOriginSamplesY || 1 || ||
 +
|-
 +
| 0x6C || LaunchDma || 1 || ||
 +
|-
 +
| 0x6D || LoadInlineData || 1 || ||
 +
|- style="border-top: double"
 +
| 0x77 || SetI2mSemaphoreA || 1 || ||
 +
|-
 +
| 0x78 || SetI2mSemaphoreB || 1 || ||
 +
|-
 +
| 0x79 || SetI2mSemaphoreC || 1 || ||
 +
|- style="border-top: double"
 +
| 0x7C || SetI2mSpareNoop00 || 1 || ||
 +
|-
 +
| 0x7D || SetI2mSpareNoop01 || 1 || ||
 +
|-
 +
| 0x7E || SetI2mSpareNoop02 || 1 || ||
 +
|-
 +
| 0x7F || SetI2mSpareNoop03 || 1 || ||
 +
|-
 +
| 0x80 || SetFalcon00 || 1 || ||
 +
|-
 +
| 0x81 || SetFalcon01 || 1 || ||
 +
|-
 +
| 0x82 || SetFalcon02 || 1 || ||
 +
|-
 +
| 0x83 || SetFalcon03 || 1 || ||
 +
|-
 +
| 0x84 || SetFalcon04 || 1 || ||
 +
|-
 +
| 0x85 || SetFalcon05 || 1 || ||
 +
|-
 +
| 0x86 || SetFalcon06 || 1 || ||
 +
|-
 +
| 0x87 || SetFalcon07 || 1 || ||
 +
|-
 +
| 0x88 || SetFalcon08 || 1 || ||
 +
|-
 +
| 0x89 || SetFalcon09 || 1 || ||
 +
|-
 +
| 0x8A || SetFalcon10 || 1 || ||
 +
|-
 +
| 0x8B || SetFalcon11 || 1 || ||
 +
|-
 +
| 0x8C || SetFalcon12 || 1 || ||
 +
|-
 +
| 0x8D || SetFalcon13 || 1 || ||
 +
|-
 +
| 0x8E || SetFalcon14 || 1 || ||
 +
|-
 +
| 0x8F || SetFalcon15 || 1 || ||
 +
|-
 +
| 0x90 || SetFalcon16 || 1 || ||
 +
|-
 +
| 0x91 || SetFalcon17 || 1 || ||
 +
|-
 +
| 0x92 || SetFalcon18 || 1 || ||
 +
|-
 +
| 0x93 || SetFalcon19 || 1 || ||
 +
|-
 +
| 0x94 || SetFalcon20 || 1 || ||
 +
|-
 +
| 0x95 || SetFalcon21 || 1 || ||
 +
|-
 +
| 0x96 || SetFalcon22 || 1 || ||
 +
|-
 +
| 0x97 || SetFalcon23 || 1 || ||
 +
|-
 +
| 0x98 || SetFalcon24 || 1 || ||
 +
|-
 +
| 0x99 || SetFalcon25 || 1 || ||
 +
|-
 +
| 0x9A || SetFalcon26 || 1 || ||
 +
|-
 +
| 0x9B || SetFalcon27 || 1 || ||
 +
|-
 +
| 0x9C || SetFalcon28 || 1 || ||
 +
|-
 +
| 0x9D || SetFalcon29 || 1 || ||
 +
|-
 +
| 0x9E || SetFalcon30 || 1 || ||
 +
|-
 +
| 0x9F || SetFalcon31 || 1 || ||
 +
|- style="border-top: double"
 +
| 0x554 || SetRenderEnableA || 1 || ||
 +
|-
 +
| 0x555 || SetRenderEnableB || 1 || ||
 +
|-
 +
| 0x556 || SetRenderEnableC || 1 || ||
 +
|- style="border-top: double"
 +
| 0x651 || SetRenderEnableOverride || 1 || ||
 +
|- style="border-top: double"
 +
| 0xD00 || SetMmeShadowScratch || uint[0x100] || 256 || Mostly general purpose, sometimes accessed by FirmwareCall.
 
|}
 
|}
  

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