Nintendo Switch Brew

Changes

TSEC (view source)

Revision as of 17:45, 27 August 2020

87 bytes removed ,  17:45, 27 August 2020
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!  Bits
 
!  Bits
 
!  Description
 
!  Description
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| Unknown
 
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  2: Error
 
  2: Error
 
  3: Disabled
 
  3: Disabled
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| 16-17
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| TSEC_BAR0_CTL_SEC_MODE
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0: None
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1: Invalid
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2: Light Secure
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3: Heavy Secure
 
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A BAR0 DMA read/write operation requires bits TSEC_BAR0_CTL_INIT and TSEC_BAR0_CTL_READ/TSEC_BAR0_CTL_WRITE to be set in TSEC_BAR0_CTL.
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Controls DMA transfers between TSEC and HOST1X (master and clients).
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During the transfer, TSEC_BAR0_CTL_STATUS is set to "Busy".
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Accessing an invalid address sets TSEC_BAR0_CTL_STATUS to "Error".
      
=== TSEC_BAR0_ADDR ===
 
=== TSEC_BAR0_ADDR ===
Retrieved from "https://switchbrew.org/wiki/Special:MobileDiff/9933"