Nintendo Switch Brew

Changes

TSEC (view source)

Revision as of 20:01, 14 August 2020

205 bytes removed ,  20:01, 14 August 2020
no edit summary
Line 4,787: Line 4,787:     
==== IV0 ====
 
==== IV0 ====
−
This is a SPR (special purpose register) that holds the address for interrupt vector 0.
+
This is a SPR (special purpose register) that holds the address for interrupt vector 0. Only bits 0 to 15 are used.
    
==== IV1 ====
 
==== IV1 ====
−
This is a SPR (special purpose register) that holds the address for interrupt vector 1.
+
This is a SPR (special purpose register) that holds the address for interrupt vector 1. Only bits 0 to 15 are used.
    
==== IV2 ====
 
==== IV2 ====
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==== EV ====
 
==== EV ====
−
This is a SPR (special purpose register) that holds the address for the exception vector.
+
This is a SPR (special purpose register) that holds the address for the exception vector. Only bits 0 to 15 are used.
    
Alternative name (envytools): "tv".
 
Alternative name (envytools): "tv".
Line 4,832: Line 4,832:  
|-
 
|-
 
| 11 || ALU zero flag
 
| 11 || ALU zero flag
−
|-
  −
| 12-15 || Unused
   
|-
 
|-
 
| 16 || Interrupt 0 enable
 
| 16 || Interrupt 0 enable
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|-
 
|-
 
| 18 || Interrupt 2 enable (undefined)
 
| 18 || Interrupt 2 enable (undefined)
−
|-
  −
| 19 || Unused
   
|-
 
|-
 
| 20 || Interrupt 0 saved enable
 
| 20 || Interrupt 0 saved enable
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|-
 
|-
 
| 22 || Interrupt 2 saved enable (undefined)
 
| 22 || Interrupt 2 saved enable (undefined)
−
|-
  −
| 23 || Unused
   
|-
 
|-
 
| 24 || Exception active
 
| 24 || Exception active
 
|-
 
|-
−
| 25 || Unused
+
| 26-31 || Unknown
−
|-
  −
| 26 || Unknown
  −
|-
  −
| 27-28 || Unused
  −
|-
  −
| 29 || Unknown
  −
|-
  −
| 30-31 || Unused
   
|}
 
|}
   Line 4,885: Line 4,871:  
  0: DMEM
 
  0: DMEM
 
  1: IMEM
 
  1: IMEM
−
|-
  −
| 8-31 || Unused
   
|}
 
|}
   Line 4,899: Line 4,883:  
|-
 
|-
 
| 0-7 || Start of region to authenticate (in 0x100 pages)
 
| 0-7 || Start of region to authenticate (in 0x100 pages)
−
|-
  −
| 8-15 || Unused
   
|-
 
|-
 
| 16 || Mark all subsequent code transfers as secret
 
| 16 || Mark all subsequent code transfers as secret
Line 4,909: Line 4,891:  
|-
 
|-
 
| 19 || Block traps and interrupts (set in HS mode)
 
| 19 || Block traps and interrupts (set in HS mode)
−
|-
  −
| 20-23 || Unused
   
|-
 
|-
 
| 24-31 || Size of region to authenticate (in 0x100 pages)
 
| 24-31 || Size of region to authenticate (in 0x100 pages)
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|-
 
|-
 
| 0-2 || CTXDMA port for code loads (xcld)
 
| 0-2 || CTXDMA port for code loads (xcld)
−
|-
  −
| 3 || Unused
   
|-
 
|-
 
| 4-6 || CTXDMA port for code stores (invalid)
 
| 4-6 || CTXDMA port for code stores (invalid)
−
|-
  −
| 7 || Unused
   
|-
 
|-
 
| 8-10 || CTXDMA port for data loads (xdld)
 
| 8-10 || CTXDMA port for data loads (xdld)
−
|-
  −
| 11 || Unused
   
|-
 
|-
 
| 12-14 || CTXDMA port for data stores (xdst)
 
| 12-14 || CTXDMA port for data stores (xdst)
−
|-
  −
| 15-31 || Unused
   
|}
 
|}
   Line 4,950: Line 4,922:  
!  Description
 
!  Description
 
|-
 
|-
−
| 0-19 || Exception PC
+
| 0-15 || Exception PC
 
|-
 
|-
 
| 20-23 || Exception cause
 
| 20-23 || Exception cause
−
|-
  −
| 24-31 || Unused
   
|}
 
|}
  
Retrieved from "https://switchbrew.org/wiki/Special:MobileDiff/9893"