Changes

702 bytes added ,  17:03, 20 January 2018
no edit summary
Line 143: Line 143:  
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
 
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
 
|-
 
|-
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC62FFF || 0x800A0000 || 0x63000 || 0x78B || R-X || [2.0.0] Kernel .text
+
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC62FFF || 0x800A0000 || 0x63000 || 0x78B || R-X || Kernel .text
 
|-
 
|-
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC62FFF || 0x800A0000 || 0x4B000 || 0x78B || R-X || [3.0.0] Kernel .text
+
| All || 0xFFFFFFF7FFC63000-0xFFFFFFF7FFC65FFF || 0x80103000 || 0x3000 || 0x6000000000078B || R-- || Kernel .rodata
 
|-
 
|-
| All || 0xFFFFFFF7FFC63000-0xFFFFFFF7FFC65FFF || 0x80103000 || 0x3000 || 0x6000000000078B || R-- || [2.0.0] Kernel .rodata
+
| All || 0xFFFFFFF7FFC66000-0xFFFFFFF7FFC6EFFF || 0x80106000 || 0x9000 || 0x6000000000070B || RW- || Kernel .data+.bss
|-
  −
| All || 0xFFFFFFF7FFC4B000-0xFFFFFFF7FFC4DFFF || 0x800EB000 || 0x3000 || 0x6000000000078B || R-- || [3.0.0] Kernel .rodata
  −
|-
  −
| All || 0xFFFFFFF7FFC66000-0xFFFFFFF7FFC6EFFF || 0x80106000 || 0x9000 || 0x6000000000070B || RW- || [2.0.0] Kernel .data+.bss
  −
|-
  −
| All || 0xFFFFFFF7FFC4E000-0xFFFFFFF7FFC5AFFF || 0x800EE000 || 0xD000 || 0x6000000000070B || RW- || [3.0.0] Kernel .data+.bss
  −
|-
  −
| All || 0xFFFFFFF7FFDC0000-0xFFFFFFF7FFDC0FFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
   
|-
 
|-
 
| All || 0xFFFFFFF7FFDC0000-0xFFFFFFF7FFDC0FFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
 
| All || 0xFFFFFFF7FFDC0000-0xFFFFFFF7FFDC0FFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
Line 202: Line 194:  
|-
 
|-
 
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
 
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
 +
|-
 +
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC62FFF || 0x800A0000 || 0x4B000 || 0x78B || R-X || Kernel .text
 +
|-
 +
| All || 0xFFFFFFF7FFC4B000-0xFFFFFFF7FFC4DFFF || 0x800EB000 || 0x3000 || 0x6000000000078B || R-- || Kernel .rodata
 +
|-
 +
| All || 0xFFFFFFF7FFC4E000-0xFFFFFFF7FFC5AFFF || 0x800EE000 || 0xD000 || 0x6000000000070B || RW- || Kernel .data+.bss
 
|-
 
|-
 
| All || 0xFFFFFFF7FFDAC000-0xFFFFFFF7FFDACFFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
 
| All || 0xFFFFFFF7FFDAC000-0xFFFFFFF7FFDACFFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
Line 410: Line 408:  
| 0x304
 
| 0x304
 
|  
 
|  
| TZRAM (TrustZone .text)
+
| TZRAM (Secure Monitor)
 
|-
 
|-
 
| 0x1F01F0000
 
| 0x1F01F0000
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| 0x304
 
| 0x304
 
|  
 
|  
| TZRAM (Armv8Boot .text)
+
| TZRAM (Secure Monitor and ARMv8 init)
 
|-
 
|-
 
| 0x1F01F6000
 
| 0x1F01F6000
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| 0x304
 
| 0x304
 
|  
 
|  
| TZRAM (Exception vectors)
+
| TZRAM (Secure Monitor exception vectors)
 
|-
 
|-
 
| 0x1F01FC000
 
| 0x1F01FC000
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| 0x300
 
| 0x300
 
|  
 
|  
| TZRAM (Secure Monitor init)
+
| TZRAM (Secure Monitor and ARMv8 init)
 
|-
 
|-
 
| 0x1F01F6000
 
| 0x1F01F6000
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|  
 
|  
 
| TZRAM
 
| TZRAM
 +
|}
 +
 +
= IRAM =
 +
== [[BCT|BCT]] ==
 +
When copied to IRAM at address 0x40000000, the BCT has an additional header as follows.
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
!  Offset
 +
!  Size
 +
!  Field
 +
!  Description
 +
|-
 +
|  0x00
 +
|  0x50
 +
|  bct_global_header
 +
|
 +
0x00: unk_version0 (0x00210001)
 +
0x04: unk_version1 (0x00210001)
 +
0x08: unk_version2 (0x00210001)
 +
0x4C: bct_data_addr (address of the actual BCT)
 +
|-
 +
|  0x50
 +
|  0x18
 +
|  bootloader0_header
 +
|
 +
0x00: is_active (if set to 0x01, bootloader0 is used)
 +
|-
 +
|  0x68
 +
|  0x18
 +
|  bootloader1_header
 +
|
 +
0x00: is_active (if set to 0x01, bootloader1 is used)
 +
|-
 +
|  0x80
 +
|  0x18
 +
|  bootloader2_header
 +
|
 +
0x00: is_active (if set to 0x01, bootloader2 is used)
 +
|-
 +
|  0x98
 +
|  0x18
 +
|  bootloader3_header
 +
|
 +
0x00: is_active (if set to 0x01, bootloader3 is used)
 +
|-
 +
|  0xB0
 +
|  0x50
 +
 +
|
 +
  0x40: bct_end_addr
 +
|-
 
|}
 
|}