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657 bytes added ,  01:43, 10 June 2017
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For all binaries(main area / NROs), the R-- section is always located immediately after R-X. The RW- section is always located immediately after the R-- section. Hence, there's no extra randomization / guard-pages for these sections.
 
For all binaries(main area / NROs), the R-- section is always located immediately after R-X. The RW- section is always located immediately after the R-- section. Hence, there's no extra randomization / guard-pages for these sections.
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==TLS==
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This is the 0x200-byte thread-local-storage, the base address is loaded via ARM threadid register tpidrro_el0.
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{| class="wikitable" border="1"
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|-
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! Offset
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! Size
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! Description
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|-
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| 0x0
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| 0x100
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| [[IPC_Marshalling|IPC]] command buffer
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|-
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| 0x100
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| 0xF8
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| ?
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|-
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| 0x1F8
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| 0x8
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| Address of threadctx+0x58.
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|}
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==Thread context==
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This is the structure of the 0x228-byte threadctx used by official userland software.
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{| class="wikitable" border="1"
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|-
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! Offset
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! Size
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! Description
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|-
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| 0x0
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| 0xA8
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| ?
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|-
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| 0xA8
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| 0x8
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| Address of the stack-bottom-mirror which the thread was created with.
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|-
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| 0xB0
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| 0x8
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| Size of the stack.
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|-
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| 0xB8
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| 0x178
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| ?
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|}