Changes

321 bytes added ,  17:50, 13 January 2019
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=== FALCON_EXCI ===
 
=== FALCON_EXCI ===
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{| class="wikitable" border="1"
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!  Bits
 +
!  Description
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|-
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| 0-19
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| PC that originated the exception
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|-
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| 20-23
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| Exception type
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0x00: Trap 0
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0x01: Trap 1
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0x02: Trap 2
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0x03: Trap 3
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0x08: Invalid opcode
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0x09: Authentication failure
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0x0A: Page fault (no hit)
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0x0B: Page fault (multi hit)
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0x0F: Breakpoint
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|}
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Contains information about raised exceptions.
 
Contains information about raised exceptions.
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|-
 
|-
 
| 6
 
| 6
| FALCON_CPUCTL_START_SCP_LS
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| FALCON_CPUCTL_STARTCPU_SECURE
 
|}
 
|}
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|}
 
|}
   −
=== TSEC_MCCIF_FIFOCTRL1 ===
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=== TSEC_TFBIF_MCCIF_FIFOCTRL1 ===
 
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
 
!  Bits
 
!  Bits
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Used to control accesses to DRAM.
 
Used to control accesses to DRAM.
   −
[6.0.0+] The nvhost_tsec firmware sets this register to (data_size << 4) before reading memory from the GPU UCODE carveout.
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[6.0.0+] The nvhost_tsec firmware sets this register to 0x20 or 0x140 before reading memory from the GPU UCODE carveout.
    
=== TSEC_DMA_CMD ===
 
=== TSEC_DMA_CMD ===