Nintendo Switch Brew

Changes

Memory layout (view source)

Revision as of 21:55, 31 August 2018

3,251 bytes added ,  21:55, 31 August 2018
5.0.0 tz memory layout
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== [[5.0.0]] ==
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5.0.0 modified the address map to have R-X, R--, and RW- segments, instead of a single RWX segment.
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Because the same L3 page is shared for all mappings, this required modifying segment layout significantly to prevent clashes.
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{| class="wikitable" border="1"
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|-
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! Vmem
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! Physmem
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! Size
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! Descriptor ORR-value
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! Description
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|-
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| 0x7C010000
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| 0x7C010000
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| 0x10000
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| 0x300
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| TZRAM Identity RWX (for init)
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|-
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| 0x40020000
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| 0x40020000
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| 0x20000
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| 0x300
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| IRAM Identity RWX (for init)
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|-
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| 0x1F0080000
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| 0x50041000
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| 0x1000
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| 0x40000000000304
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| ARM Interrupt Distributor
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|-
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| 0x1F0082000
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| 0x50042000
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| 0x2000
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| 0x40000000000304
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| Interrupt Controller Physical CPU
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|-
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| 0x1F0085000
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| 0x70006000
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| 0x1000
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| 0x40000000000324
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| UART-A
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|-
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| 0x1F0087000
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| 0x60006000
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| 0x1000
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| 0x40000000000324
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| Clock and Reset
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|-
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| 0x1F0089000
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| 0x7000E000
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| 0x1000
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| 0x40000000000304
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| PMC
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|-
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| 0x1F008B000
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| 0x60005000
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| 0x1000
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| 0x40000000000304
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| Timers
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|-
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| 0x1F008D000
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| 0x6000C000
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| 0x1000
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| 0x40000000000304
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| System Registers
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|-
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| 0x1F008F000
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| 0x70012000
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| 0x2000
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| 0x40000000000304
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| Security Engine
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|-
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| 0x1F00AD000
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| 0x70412000
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| 0x2000
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| 0x40000000000304
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| Undocumented/Not Present (Security Engine for Mariko?)
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|-
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| 0x1F0092000
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| 0x700F0000
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| 0x1000
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| 0x40000000000304
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| SYSCTR0
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|-
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| 0x1F0094000
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| 0x70019000
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| 0x1000
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| 0x40000000000304
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| Memory Controller
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|-
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| 0x1F0096000
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| 0x7000F000
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| 0x1000
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| 0x40000000000304
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| Fuse Registers
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|-
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| 0x1F0098000
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| 0x70000000
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| 0x4000
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| 0x40000000000304
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| MISC Registers
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|-
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| 0x1F009D000
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| 0x60007000
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| 0x1000
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| 0x40000000000304
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| Flow Controller
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|-
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| 0x1F009F000
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| 0x40002000
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| 0x1000
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| 0x40000000000304
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| IRAM
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|-
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| 0x1F00A1000
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| 0x7000D000
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| 0x1000
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| 0x40000000000304
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| I2C-5
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|-
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| 0x1F00A3000
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| 0x6000D000
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| 0x1000
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| 0x40000000000304
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| GPIO-1
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|-
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| 0x1F00A5000
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| 0x7000C000
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| 0x1000
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| 0x40000000000304
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| I2C
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|-
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| 0x1F00A7000
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| 0x6000F000
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| 0x1000
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| 0x40000000000304
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| BPMP Exception Vectors
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|-
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| 0x1F00A9000
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| 0x7001C000
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| 0x1000
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| 0x40000000000304
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| MC0
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|-
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| 0x1F00AB000
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| 0x7001D000
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| 0x1000
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| 0x40000000000304
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| MC1
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|-
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| 0x1F0100000
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| 0x7C010000
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| 0x10000
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| 0x40000000000380
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| TZRAM (R-- for context save)
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|-
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| 0x1F0140000
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| 0x7C012000
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| 0x9000
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| 0x300
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| TZRAM (R-X .text)
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|-
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| 0x1F0149000
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| 0x7C01B000
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| 0x1000
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| 0x40000000000300
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| TZRAM (R-- .rodata)
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|-
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| 0x1F014A000
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| 0x7C01C000
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| 0x2000
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| 0x40000000000300
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| TZRAM (RW- .rwdata)
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|-
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| 0x1F01A0000
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| 0x40020000
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| 0x10000
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| 0x40000000000324
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| IRAM (RW- for context save)
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|-
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| 0x1F01B0000
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| 0x40003000
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| 0x1000
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| 0x40000000000324
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| IRAM (BPMP firmware destination)
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|-
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| 0x1F01C7000
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| 0x8000F000
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| 0x1000
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| 0x40000000000324
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| DRAM (SE Context Save destination)
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|-
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| 0x1F01E0000
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| 0x7C010000
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| 0x2000
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| 0x300
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| TZRAM (RWX pk2ldr for init)
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|-
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| 0x1F01F4000
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| X
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| 0x1000
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| 0x40000000000723
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| DRAM (SPL .bss buffer visible to the Security Engine)
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|-
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| 0x1F01F6000
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| 0x7C010000
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| 0x1000
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| 0x40000000000300
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| TZRAM (stacks)
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|-
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| 0x1F01F8000
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| 0x7C011000
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| 0x1000
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| 0x40000000000300
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| TZRAM (stacks)
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|-
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| 0x1F01FA000
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| 0x7C01D000
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| 0x1000
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| 0x40000000000300
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| TZRAM (stacks, warmboot crt0)
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|-
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| 0x1F01FC000
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| 0x7C01E000
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| 0x1000
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| 0x40000000000300
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| TZRAM (L2 Page Table)
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|-
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| 0x1F01FE000
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| 0x7C01F000
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| 0x1000
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| 0x40000000000300
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| TZRAM (L3 Page Table)
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|-
 
|}
 
|}
  
Retrieved from "https://switchbrew.org/wiki/Special:MobileDiff/4957"