Changes

2,027 bytes removed ,  20:48, 19 February 2018
m
Reverted edits by Hexkyz (talk) to last revision by Q
Line 143: Line 143:  
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
 
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
 
|-
 
|-
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC62FFF || 0x800A0000 || 0x63000 || 0x78B || R-X || Kernel .text
+
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC62FFF || 0x800A0000 || 0x63000 || 0x78B || R-X || [2.0.0] Kernel .text
 
|-
 
|-
| All || 0xFFFFFFF7FFC63000-0xFFFFFFF7FFC65FFF || 0x80103000 || 0x3000 || 0x6000000000078B || R-- || Kernel .rodata
+
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC62FFF || 0x800A0000 || 0x4B000 || 0x78B || R-X || [3.0.0] Kernel .text
 
|-
 
|-
| All || 0xFFFFFFF7FFC66000-0xFFFFFFF7FFC6EFFF || 0x80106000 || 0x9000 || 0x6000000000070B || RW- || Kernel .data+.bss
+
| All || 0xFFFFFFF7FFC63000-0xFFFFFFF7FFC65FFF || 0x80103000 || 0x3000 || 0x6000000000078B || R-- || [2.0.0] Kernel .rodata
 +
|-
 +
| All || 0xFFFFFFF7FFC4B000-0xFFFFFFF7FFC4DFFF || 0x800EB000 || 0x3000 || 0x6000000000078B || R-- || [3.0.0] Kernel .rodata
 +
|-
 +
| All || 0xFFFFFFF7FFC66000-0xFFFFFFF7FFC6EFFF || 0x80106000 || 0x9000 || 0x6000000000070B || RW- || [2.0.0] Kernel .data+.bss
 +
|-
 +
| All || 0xFFFFFFF7FFC4E000-0xFFFFFFF7FFC5AFFF || 0x800EE000 || 0xD000 || 0x6000000000070B || RW- || [3.0.0] Kernel .data+.bss
 +
|-
 +
| All || 0xFFFFFFF7FFDC0000-0xFFFFFFF7FFDC0FFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
 
|-
 
|-
 
| All || 0xFFFFFFF7FFDC0000-0xFFFFFFF7FFDC0FFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
 
| All || 0xFFFFFFF7FFDC0000-0xFFFFFFF7FFDC0FFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
Line 194: Line 202:  
|-
 
|-
 
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
 
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
|-
  −
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC4AFFF || 0x800A0000 || 0x4B000 || 0x78B || R-X || Kernel .text
  −
|-
  −
| All || 0xFFFFFFF7FFC4B000-0xFFFFFFF7FFC4DFFF || 0x800EB000 || 0x3000 || 0x6000000000078B || R-- || Kernel .rodata
  −
|-
  −
| All || 0xFFFFFFF7FFC4E000-0xFFFFFFF7FFC5AFFF || 0x800EE000 || 0xD000 || 0x6000000000070B || RW- || Kernel .data+.bss
  −
|-
  −
| All || 0xFFFFFFF7FFDAC000-0xFFFFFFF7FFDACFFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
  −
|-
  −
| All || 0xFFFFFFF7FFDAE000-0xFFFFFFF7FFDAEFFF || 0x7001D000 || 0x1000 || 0x60000000000607 || RW- || MC1
  −
|-
  −
| All || 0xFFFFFFF7FFDB0000-0xFFFFFFF7FFDB0FFF || 0x7001C000 || 0x1000 || 0x60000000000607 || RW- || MC0
  −
|-
  −
| All || 0xFFFFFFF7FFDB2000-0xFFFFFFF7FFDB2FFF || 0x70019000 || 0x1000 || 0x60000000000607 || RW- || MC
  −
|-
  −
| All || 0xFFFFFFF7FFDB4000-0xFFFFFFF7FFDB4FFF || 0x70006000 || 0x1000 || 0x60000000000607 || RW- || UART-A
  −
|-
  −
| All || 0xFFFFFFF7FFDFB000-0xFFFFFFF7FFDFBFFF || 0x50041000 || 0x1000 || 0x60000000000607 || RW- || ARM Interrupt Distributor
  −
|-
  −
| All || 0xFFFFFFF7FFDFD000-0xFFFFFFF7FFDFDFFF || 0x50042000 || 0x1000 || 0x60000000000607 || RW- || Interrupt Controller Physical CPU interface
  −
|}
  −
  −
== 4.0.0 ==
  −
{| class="wikitable" border="1"
  −
|-
  −
! Cores || Virtual || Physical || Size || Attributes || Permissions || Description
  −
|-
  −
| All || 0xFFFFFFF7FFC00000-0xFFFFFFF7FFC50FFF || 0x800A0000 || 0x51000 || 0x4000000000078B || R-X || Kernel .text
  −
|-
  −
| All || 0xFFFFFFF7FFC51000-0xFFFFFFF7FFC53FFF || 0x800F1000 || 0x3000 || 0x6000000000078B || R-- || Kernel .rodata
  −
|-
  −
| All || 0xFFFFFFF7FFC54000-0xFFFFFFF7FFC61FFF || 0x800F4000 || 0xE000 || 0x6000000000070B || RW- || Kernel .data+.bss
   
|-
 
|-
 
| All || 0xFFFFFFF7FFDAC000-0xFFFFFFF7FFDACFFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
 
| All || 0xFFFFFFF7FFDAC000-0xFFFFFFF7FFDACFFF || 0x60006000 || 0x1000 || 0x60000000000607 || RW- || Clock and Reset
Line 315: Line 291:  
| 0x40000000000304
 
| 0x40000000000304
 
|  
 
|  
| PMC
+
| RTC
 
|-
 
|-
 
| 0x1F000B000
 
| 0x1F000B000
Line 434: Line 410:  
| 0x304
 
| 0x304
 
|  
 
|  
| TZRAM (Secure Monitor)
+
| TZRAM (TrustZone .text)
 
|-
 
|-
 
| 0x1F01F0000
 
| 0x1F01F0000
Line 441: Line 417:  
| 0x304
 
| 0x304
 
|  
 
|  
| TZRAM (Secure Monitor and ARMv8 init)
+
| TZRAM (Armv8Boot .text)
 
|-
 
|-
 
| 0x1F01F6000
 
| 0x1F01F6000
Line 462: Line 438:  
| 0x304
 
| 0x304
 
|  
 
|  
| TZRAM (Secure Monitor exception vectors)
+
| TZRAM (Exception vectors)
 
|-
 
|-
 
| 0x1F01FC000
 
| 0x1F01FC000
Line 537: Line 513:  
| 0x40000000000304
 
| 0x40000000000304
 
|  
 
|  
| PMC
+
| RTC
 
|-
 
|-
 
| 0x1F008B000
 
| 0x1F008B000
Line 677: Line 653:  
| 0x300
 
| 0x300
 
|  
 
|  
| TZRAM (Secure Monitor and ARMv8 init)
+
| TZRAM (Secure Monitor init)
 
|-
 
|-
 
| 0x1F01F6000
 
| 0x1F01F6000
Line 713: Line 689:  
|  
 
|  
 
| TZRAM
 
| TZRAM
|}
  −
  −
= IRAM =
  −
== [[BCT|BCT]] ==
  −
When copied to IRAM at address 0x40000000, the BCT has an additional header as follows.
  −
  −
{| class="wikitable" border="1"
  −
|-
  −
!  Offset
  −
!  Size
  −
!  Field
  −
!  Description
  −
|-
  −
|  0x00
  −
|  0x50
  −
|  bct_global_header
  −
|
  −
0x00: unk_version0 (0x00210001)
  −
0x04: unk_version1 (0x00210001)
  −
0x08: unk_version2 (0x00210001)
  −
0x4C: bct_data_addr (address of the actual BCT)
  −
|-
  −
|  0x50
  −
|  0x18
  −
|  bootloader0_header
  −
|
  −
0x00: is_active (if set to 0x01, bootloader0 is used)
  −
|-
  −
|  0x68
  −
|  0x18
  −
|  bootloader1_header
  −
|
  −
0x00: is_active (if set to 0x01, bootloader1 is used)
  −
|-
  −
|  0x80
  −
|  0x18
  −
|  bootloader2_header
  −
|
  −
0x00: is_active (if set to 0x01, bootloader2 is used)
  −
|-
  −
|  0x98
  −
|  0x18
  −
|  bootloader3_header
  −
|
  −
0x00: is_active (if set to 0x01, bootloader3 is used)
  −
|-
  −
|  0xB0
  −
|  0x50
  −
  −
|
  −
  0x40: bct_end_addr
  −
|-
   
|}
 
|}