Memory layout: Difference between revisions

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@@ Line 50: / Line 50: @@
   this->MapBaseAddr = BaseAddr + min(rnd0, rnd1)
   this->HeapRegionBaseAddr = this->MapBaseAddr + MapRegionSize + max(rnd0, rnd1) - min(rnd0, rnd1)
-==TLS==
-This is the 0x200-byte thread-local-storage, the base address is loaded via ARM threadid register tpidrro_el0.
-{| class="wikitable" border="1"
-|-
-! Offset
-! Size
-! Description
-|-
-| 0x0
-| 0x100
-| [[IPC_Marshalling|IPC]] command buffer
-|-
-| 0x100
-| 0xF8
-| ?
-|-
-| 0x1F8
-| 0x8
-| Address of threadctx+0x58.
-|}
 ==Thread context==