Bus services: Difference between revisions
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| [2.0.0+] 26 || HdmiHdcp || 0x34000003 || 3:3A || N || 100000 || 0 || 0 || HDMI HDCP || [[NV services]] || Copper, Calcio | | [2.0.0+] 26 || HdmiHdcp || 0x34000003 || 3:3A || N || 100000 || 0 || 0 || HDMI HDCP || [[NV services]] || Copper, Calcio | ||
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| [4.0.0+] 27 || Fan53528 || 0x3A000005 || 4:52 ([4.0.0-8.0.0] 4:A4) || N || 400000 || 0 || 0 || RAM Regulator ( | | [4.0.0+] 27 || Fan53528 || 0x3A000005 || 4:52 ([4.0.0-8.0.0] 4:A4) || N || 400000 || 0 || 0 || RAM Regulator (tied to Max77812Pmic) || || Hoag, Iowa, Calcio, Aula | ||
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| [4.0.0+] 28 || Max77812Pmic || 0x3A000002 || 4:31 ([8.0.0-9.2.0] 4:33, [4.0.0-8.0.0] 4:31) || N || 400000 || 0 || 0 || Sub-PMIC for CPU and GPU ( | | [4.0.0+] 28 || Max77812Pmic || 0x3A000002 || 4:31 ([8.0.0-9.2.0] 4:33, [4.0.0-8.0.0] 4:31) || N || 400000 || 0 || 0 || Sub-PMIC for CPU and GPU (tied to Fan53528) (Phase 31) || [[PCV services]] || Hoag, Iowa, Calcio, Aula | ||
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| [4.0.0+] 29 || Max77812Pmic || 0x3A000006 ([4.0.0-9.2.0] 0x3A000002) || 4:33 ([4.0.0-8.0.0] 4:31) || N || 400000 || 0 || 0 || Sub-PMIC for GPU, CPU and RAM (Phase 211) || [[PCV services]] || Hoag, Iowa, Calcio, Aula | | [4.0.0+] 29 || Max77812Pmic || 0x3A000006 ([4.0.0-9.2.0] 0x3A000002) || 4:33 ([4.0.0-8.0.0] 4:31) || N || 400000 || 0 || 0 || Sub-PMIC for GPU, CPU and RAM (Phase 211) || [[PCV services]] || Hoag, Iowa, Calcio, Aula | ||