4,628
edits
Changes
→2.0.0
Line 83:
Line 83:
== [[2.0.0]] ==
== [[2.0.0]] ==
+
+"Vector Base Address Register (EL1)" = 0xfffffff7ffc50800.
+
+The table for TTBR0 only contains the following:
+* Vmem 0x80000000 is mapped to physmem 0x80000000, using a size loaded from a register. This is only done when: "endaddr = 0x7fffffff + size; if(endaddr >= 0x80000001){...}"
+** The size is loaded from: "(u32 *0x70019050 & 0x3fff) << 20;"
+** The value written to the MMU-table descriptor is: "physaddr | val | 0x709;". val is 1<<52 when "size>>34" is non-zero, otherwise val=0.