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Line 4,958: − Interface for handling memory reads from SCP to Falcon.+ − Can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]].+ − Interface for handling memory writes from Falcon to SCP.+ − Can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]].+ − Interface for translating Falcon crypto operands into SCP commands.+ − Can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]] and reports the status of the current command through register [[#TSEC_SCP_CMD|TSEC_SCP_CMD]].+ − Configurable block for recording and executing sequences of crypto operations in the form of macros.+
no edit summary
|-
|-
| 10
| 10
| Enable the [[#LOAD|LOAD]] interface
| Enable the [[#LOAD|LOAD]] block's interface
|-
|-
| 12
| 12
| Enable the [[#STORE|STORE]] interface
| Enable the [[#STORE|STORE]] block's interface
|-
|-
| 14
| 14
| Enable the [[#CMD|CMD]] interface
| Enable the [[#CMD|CMD]] block's interface
|-
|-
| 16
| 16
|-
|-
| 0
| 0
| Clear all [[#SEQ|SEQ]] block's instructions
| Clear [[#SEQ|SEQ]] block's pipeline
|-
|-
| 8
| 8
| Unknown
| Clear the main [[#SCP|SCP]] pipeline
|-
|-
| 11
| 11
|-
|-
| 16
| 16
| Enable [[#LOAD|LOAD]] interface's dummy mode (all reads return 0)
| Enable [[#LOAD|LOAD]] block's interface dummy mode (all reads return 0)
|-
|-
| 20
| 20
| Enable [[#LOAD|LOAD]] interface bypassing (all reads are dropped)
| Enable [[#LOAD|LOAD]] block's interface bypassing (all reads are dropped)
|-
|-
| 24
| 24
| Enable [[#STORE|STORE]] interface bypassing (all writes are dropped)
| Enable [[#STORE|STORE]] block's interface bypassing (all writes are dropped)
|}
|}
|-
|-
| 4
| 4
| Unknown
| [[#AES|AES]] block's endianness
0: Little
1: Big
|-
|-
| 8
| 8
| Flush the [[#CMD|CMD]] interface
| Flush [[#CMD|CMD]] block's pipeline
|-
|-
| 12-13
| 12-13
|-
|-
| 19-22
| 19-22
| [[#LOAD|LOAD]] interface's pipeline size
| [[#LOAD|LOAD]] block's pipeline size
|-
|-
| 23
| 23
| [[#LOAD|LOAD]] interface's current instruction is valid
| [[#LOAD|LOAD]] block's current operation is valid
|-
|-
| 24
| 24
| [[#LOAD|LOAD]] interface is running in HS mode
| [[#LOAD|LOAD]] block is running in HS mode
|-
|-
| 25-26
| 25-26
| [[#STORE|STORE]] interface's pipeline size
| [[#STORE|STORE]] block's pipeline size
|-
|-
| 30
| 30
| [[#STORE|STORE]] interface's current instruction is valid
| [[#STORE|STORE]] block's current operation is valid
|-
|-
| 31
| 31
| [[#STORE|STORE]] interface is running in HS mode
| [[#STORE|STORE]] block is running in HS mode
|}
|}
|-
|-
| 28
| 28
| [[#CMD|CMD]] interface's current instruction is valid
| [[#CMD|CMD]] block's current instruction is valid
|-
|-
| 31
| 31
| [[#CMD|CMD]] interface is running in HS mode
| [[#CMD|CMD]] block is running in HS mode
|}
|}
|-
|-
| 2
| 2
| [[#CMD|CMD]] interface is active
| [[#CMD|CMD]] block's interface is active
|-
|-
| 4
| 4
| [[#STORE|STORE]] interface is active
| [[#STORE|STORE]] block's interface is active
|-
|-
| 6
| 6
|-
|-
| 10
| 10
| [[#LOAD|LOAD]] interface is active
| [[#LOAD|LOAD]] block's interface is active
|-
|-
| 14
| 14
|-
|-
| 4
| 4
| [[#LOAD|LOAD]] interface is running in HS mode
| [[#LOAD|LOAD]] block's interface is running in HS mode
|-
|-
| 6
| 6
| [[#LOAD|LOAD]] interface is ready
| [[#LOAD|LOAD]] block's interface is ready
|-
|-
| 8
| 8
| [[#STORE|STORE]] interface is running in HS mode
| [[#STORE|STORE]] block's interface is running in HS mode
|-
|-
| 10
| 10
| [[#STORE|STORE]] interface received a valid instruction
| [[#STORE|STORE]] block's interface received a valid operation
|-
|-
| 12
| 12
| [[#CMD|CMD]] interface is running in HS mode
| [[#CMD|CMD]] block's interface is running in HS mode
|-
|-
| 14
| 14
| [[#CMD|CMD]] interface received a valid instruction
| [[#CMD|CMD]] block's interface received a valid instruction
|}
|}
|-
|-
| 0-4
| 0-4
| Current SEQ opcode
| Current [[#SEQ|SEQ]] block opcode
|-
|-
| 5-9
| 5-9
| Current CMD opcode
| Current [[#CMD|CMD]] block's interface opcode
|-
|-
| 10-14
| 10-14
| Pending CMD opcode
| Pending [[#CMD|CMD]] block opcode
|-
|-
| 15-16
| 15-16
| AES operation
| Current [[#AES|AES]] block operation
0: Encryption
0: Encryption
1: Decryption
1: Decryption
|-
|-
| 25
| 25
| STORE operation is stalled
| [[#STORE|STORE]] block is stalled
|-
|-
| 26
| 26
| LOAD operation is stalled
| [[#LOAD|LOAD]] block is stalled
|-
|-
| 27
| 27
| RNG operation is stalled
| [[#RNG|RNG]] block is stalled
|-
|-
| 28
| 28
|-
|-
| 29
| 29
| AES operation is stalled
| [[#AES|AES]] block is stalled
|}
|}
|-
|-
| 0
| 0
| Internal RND controller is ready
| [[#RND|RND]] block is ready
|-
|-
| 4-7
| 4-7
|-
|-
| 0
| 0
| RND ready
| [[#RND|RND]] ready
|-
|-
| 8
| 8
|-
|-
| 16
| 16
| CMD error
| [[#CMD|CMD]] error
|-
|-
| 20
| 20
|-
|-
| 24
| 24
| RND operation
| [[#RND|RND]] operation
|-
|-
| 28
| 28
|-
|-
| 0
| 0
| RND ready
| [[#RND|RND]] ready
|-
|-
| 8
| 8
|-
|-
| 16
| 16
| CMD error
| [[#CMD|CMD]] error
|-
|-
| 20
| 20
|-
|-
| 24
| 24
| RND operation
| [[#RND|RND]] operation
|-
|-
| 28
| 28
|-
|-
| 0
| 0
| Invalid command
| Invalid [[#CMD|CMD]] command
|-
|-
| 4
| 4
| Empty crypto sequence
| Empty [[#SEQ|SEQ]] sequence
|-
|-
| 8
| 8
| Crypto sequence is too long
| [[#SEQ|SEQ]] sequence is too long
|-
|-
| 12
| 12
| Crypto sequence was not finished
| [[#SEQ|SEQ]] sequence was not finished
|-
|-
| 16
| 16
|-
|-
| 0-31
| 0-31
| RND clock trigger lower limit
| [[#RND|RND]] clock trigger lower limit
|}
|}
|-
|-
| 0-15
| 0-15
| RND clock trigger upper limit
| [[#RND|RND]] clock trigger upper limit
|-
|-
| 16-31
| 16-31
| RND clock trigger mask
| [[#RND|RND]] clock trigger mask
|}
|}
Controls the Activity Monitor. Disconnected on the TSEC.
Controls the Activity Monitor. Disconnected on the TSEC.
=== TSEC_TFBIF_ACTMON_MCB_MASK ===
=== TSEC_TFBIF_ACTMON_MCB_MASK ===
| 0-7 || Start of region to authenticate (in pages of 0x100 bytes)
| 0-7 || Start of region to authenticate (in pages of 0x100 bytes)
|-
|-
| 16 || Mark all subsequent code transfers as secret
| 16 || Force secure DMA transfers
|-
|-
| 17 || Decrypt region to authenticate
| 17 || Decrypt region to authenticate
==== LOAD ====
==== LOAD ====
Block for handling memory reads from SCP to Falcon. It communicates with Falcon over a dedicated interface.
The interface can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]].
==== STORE ====
==== STORE ====
Block for handling memory writes from Falcon to SCP. It communicates with Falcon over a dedicated interface.
The interface can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]].
==== CMD ====
==== CMD ====
Block for translating Falcon crypto operands into SCP commands. It communicates with Falcon over a dedicated interface.
The interface can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]]. The status of the current command is reported through register [[#TSEC_SCP_CMD|TSEC_SCP_CMD]].
==== SEQ ====
==== SEQ ====
Block for recording and executing sequences of crypto operations in the form of macros.
Can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]].
Can be enabled or disabled by register [[#TSEC_SCP_CTL0|TSEC_SCP_CTL0]].