Line 1: |
Line 1: |
− | The Nintendo Switch makes use of Tegra's fuse driver for a number of operations. This driver is mapped to physical address 0x7000F800 with a total size of 0x400 bytes and exposes several registers for fuse programming. | + | The Nintendo Switch uses the Tegra's fuse driver for accessing one time programmable data. |
| | | |
− | Registers from 0x7000F800 to 0x7000F800 + 0xFF can be used to directly program the hardware fuse bitmap, while registers from 0x7000F800 + 0x100 (FUSE_CHIP_REG_START_OFFSET) to 0x7000F800 + 0x3FC (FUSE_CHIP_REG_END_OFFSET) represent cached values read from certain fuses. | + | = Registers = |
| + | The fuse driver is mapped to physical address 0x7000F800 with a total size of 0x400 bytes and exposes several registers for fuse programming. |
| | | |
− | == Registers == | + | == Erista == |
− | Below is a list of fuse driver registers used by the Switch's bootloaders.
| + | Registers from 0x7000F800 to 0x7000F800 + 0xFC represent the actual fuse [[#Driver|driver]] which can be used to directly program the hardware fuse bitmap. |
| | | |
− | === Driver registers === | + | Registers from 0x7000F800 + 0x100 (FUSE_CHIP_REG_START_OFFSET) to 0x7000F800 + 0x3FC (FUSE_CHIP_REG_END_OFFSET) represent the fuse [[#Cache|cache]] which holds the sensed values of certain fuses. |
| + | |
| + | === Driver === |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| ! Name | | ! Name |
Line 49: |
Line 52: |
| | [[#FUSE_WRITE_ACCESS_SW|FUSE_WRITE_ACCESS_SW]] | | | [[#FUSE_WRITE_ACCESS_SW|FUSE_WRITE_ACCESS_SW]] |
| | 0x7000F830 | | | 0x7000F830 |
− | |-
| |
− | | [[#FUSE_PWR_GOOD_SW|FUSE_PWR_GOOD_SW]]
| |
− | | 0x7000F834
| |
| |- | | |- |
| | [[#FUSE_PRIV2RESHIFT|FUSE_PRIV2RESHIFT]] | | | [[#FUSE_PRIV2RESHIFT|FUSE_PRIV2RESHIFT]] |
Line 324: |
Line 324: |
| | | |
| Controls and returns the status of software writes to the fuse cache registers. | | Controls and returns the status of software writes to the fuse cache registers. |
− |
| |
− | ==== FUSE_PWR_GOOD_SW ====
| |
− | {| class="wikitable" border="1"
| |
− | ! Bits
| |
− | ! Description
| |
− | |-
| |
− | | 0
| |
− | | FUSE_PWR_GOOD_SW_VAL
| |
− | |}
| |
− |
| |
− | This register is deprecated and has no effect.
| |
| | | |
| ==== FUSE_PRIV2RESHIFT ==== | | ==== FUSE_PRIV2RESHIFT ==== |
Line 369: |
Line 358: |
| |- | | |- |
| | 9 | | | 9 |
− | | FUSE_PRIV2RESHIFT_TRIG_1_SCPU_VAL | + | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU0_VAL |
| |- | | |- |
| | 10 | | | 10 |
− | | FUSE_PRIV2RESHIFT_TRIG_1_SL2_TBANK_VAL | + | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU1_VAL |
| |- | | |- |
| | 11 | | | 11 |
− | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU0_VAL | + | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU2_VAL |
| |- | | |- |
| | 12 | | | 12 |
− | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU1_VAL | + | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU3_VAL |
| |- | | |- |
| | 13 | | | 13 |
− | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU2_VAL | + | | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK0_VAL |
| |- | | |- |
| | 14 | | | 14 |
− | | FUSE_PRIV2RESHIFT_STATUS_1_FCPU3_VAL | + | | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK1_VAL |
| |- | | |- |
| | 15 | | | 15 |
− | | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK0_VAL | + | | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK2_VAL |
| |- | | |- |
| | 16 | | | 16 |
− | | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK1_VAL
| |
− | |-
| |
− | | 17
| |
− | | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK2_VAL
| |
− | |-
| |
− | | 18
| |
| | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK3_VAL | | | FUSE_PRIV2RESHIFT_STATUS_1_FL2_TBANK3_VAL |
− | |-
| |
− | | 19
| |
− | | FUSE_PRIV2RESHIFT_STATUS_1_SCPU_VAL
| |
− | |-
| |
− | | 20
| |
− | | FUSE_PRIV2RESHIFT_STATUS_1_SL2_TBANK_VAL
| |
| |} | | |} |
| | | |
Line 473: |
Line 450: |
| Returns whether [[#Bitmap|private_key4]] is empty or not. | | Returns whether [[#Bitmap|private_key4]] is empty or not. |
| | | |
− | === Cache registers === | + | === Cache === |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| ! Name | | ! Name |
Line 499: |
Line 476: |
| | 0x7000F918 | | | 0x7000F918 |
| |- | | |- |
− | | FUSE_DAC_CRT_CALIB
| + | | [[#FUSE_OPT_FT_REV|FUSE_OPT_FT_REV]] |
− | | 0x7000F91C
| |
− | |-
| |
− | | FUSE_DAC_HDTV_CALIB
| |
− | | 0x7000F920
| |
− | |-
| |
− | | FUSE_DAC_SDTV_CALIB
| |
− | | 0x7000F924
| |
− | |-
| |
− | | [[#FUSE_OPT_FT_REV|FUSE_OPT_FT_REV]] | |
| | 0x7000F928 | | | 0x7000F928 |
| |- | | |- |
Line 528: |
Line 496: |
| | FUSE_SOC_IDDQ_CALIB | | | FUSE_SOC_IDDQ_CALIB |
| | 0x7000F940 | | | 0x7000F940 |
− | |-
| |
− | | FUSE_RESERVED_PRODUCTION_WP
| |
− | | 0x7000F944
| |
| |- | | |- |
| | [[#FUSE_FA|FUSE_FA]] | | | [[#FUSE_FA|FUSE_FA]] |
Line 582: |
Line 547: |
| | FUSE_TSENSOR2_CALIB | | | FUSE_TSENSOR2_CALIB |
| | 0x7000F988 | | | 0x7000F988 |
− | |-
| |
− | | FUSE_VSENSOR_CALIB
| |
− | | 0x7000F98C
| |
| |- | | |- |
| | [[#FUSE_OPT_CP_REV|FUSE_OPT_CP_REV]] | | | [[#FUSE_OPT_CP_REV|FUSE_OPT_CP_REV]] |
Line 654: |
Line 616: |
| | FUSE_OBS_DIS | | | FUSE_OBS_DIS |
| | 0x7000F9E8 | | | 0x7000F9E8 |
− | |-
| |
− | | FUSE_NOR_INFO
| |
− | | 0x7000F9EC
| |
| |- | | |- |
| | FUSE_USB_CALIB | | | FUSE_USB_CALIB |
Line 706: |
Line 665: |
| | 0x7000FA2C | | | 0x7000FA2C |
| |- | | |- |
− | | FUSE_SKU_BOND_OUT_L | + | | FUSE_CLOCK_BOUNDOUT0 |
| | 0x7000FA30 | | | 0x7000FA30 |
| |- | | |- |
− | | FUSE_SKU_BOND_OUT_H | + | | FUSE_CLOCK_BOUNDOUT1 |
| | 0x7000FA34 | | | 0x7000FA34 |
− | |-
| |
− | | FUSE_SKU_BOND_OUT_U
| |
− | | 0x7000FA38
| |
− | |-
| |
− | | FUSE_SKU_BOND_OUT_V
| |
− | | 0x7000FA3C
| |
− | |-
| |
− | | FUSE_SKU_BOND_OUT_W
| |
− | | 0x7000FA40
| |
| |- | | |- |
| | FUSE_OPT_SAMPLE_TYPE | | | FUSE_OPT_SAMPLE_TYPE |
Line 882: |
Line 832: |
| | FUSE_RESERVED_FIELD | | | FUSE_RESERVED_FIELD |
| | 0x7000FB54 | | | 0x7000FB54 |
− | |-
| |
− | | FUSE_OPT_ECC_EN
| |
− | | 0x7000FB58
| |
| |- | | |- |
| | FUSE_SPARE_REALIGNMENT_REG | | | FUSE_SPARE_REALIGNMENT_REG |
Line 1,187: |
Line 1,134: |
| [4.0.0+] This value is no longer used during boot. | | [4.0.0+] This value is no longer used during boot. |
| | | |
− | == Bitmap == | + | == Mariko == |
− | The actual hardware fuses are stored in a bitmap and may be programmed through the fuse driver after enabling fuse programming.
| + | Registers from 0x7000F800 to 0x7000F800 + 0x94 represent the actual fuse [[#Driver_2|driver]] which can be used to directly program the hardware fuse bitmap. |
| + | |
| + | Registers from 0x7000F800 + 0x98 to 0x7000F800 + 0x3FC represent the fuse [[#Cache_2|cache]] which holds the sensed values of certain fuses. |
| | | |
− | Fuse numbers are relative to the start of the fuse bitmap where each element is a 4 byte word and has a redundant alias. A single fuse write operation must always write the same value to '''fuse_bitmap + ((fuse_number + 0) << 2)''' (PRIMARY_ALIAS) and '''fuse_bitmap + ((fuse_number + 1) << 2)''' (REDUNDANT_ALIAS). However, spare bits and all fuses afterwards in the fuse bitmap, no longer have a redundant alias.
| + | === Driver === |
| + | Same registers as in the Erista's fuse [[#Driver|driver]]. |
| | | |
− | Below is a list of common fuses used by Tegra devices (and applicable to the Switch).
| + | === Cache === |
| + | {| class="wikitable" border="1" |
| + | ! Name |
| + | ! Address |
| + | |- |
| + | | FUSE_RESERVED_ODM8 |
| + | | 0x7000F898 |
| + | |- |
| + | | FUSE_RESERVED_ODM9 |
| + | | 0x7000F89C |
| + | |- |
| + | | FUSE_RESERVED_ODM10 |
| + | | 0x7000F8A0 |
| + | |- |
| + | | FUSE_RESERVED_ODM11 |
| + | | 0x7000F8A4 |
| + | |- |
| + | | FUSE_RESERVED_ODM12 |
| + | | 0x7000F8A8 |
| + | |- |
| + | | FUSE_RESERVED_ODM13 |
| + | | 0x7000F8AC |
| + | |- |
| + | | FUSE_RESERVED_ODM14 |
| + | | 0x7000F8B0 |
| + | |- |
| + | | FUSE_RESERVED_ODM15 |
| + | | 0x7000F8B4 |
| + | |- |
| + | | FUSE_RESERVED_ODM16 |
| + | | 0x7000F8B8 |
| + | |- |
| + | | FUSE_RESERVED_ODM17 |
| + | | 0x7000F8BC |
| + | |- |
| + | | FUSE_RESERVED_ODM18 |
| + | | 0x7000F8C0 |
| + | |- |
| + | | FUSE_RESERVED_ODM19 |
| + | | 0x7000F8C4 |
| + | |- |
| + | | FUSE_RESERVED_ODM20 |
| + | | 0x7000F8C8 |
| + | |- |
| + | | FUSE_RESERVED_ODM21 |
| + | | 0x7000F8CC |
| + | |- |
| + | | |
| + | | 0x7000F8D0 |
| + | |- |
| + | | |
| + | | 0x7000F8D4 |
| + | |- |
| + | | |
| + | | 0x7000F8D8 |
| + | |- |
| + | | |
| + | | 0x7000F8DC |
| + | |- |
| + | | |
| + | | 0x7000F8E0 |
| + | |- |
| + | | |
| + | | 0x7000F8E4 |
| + | |- |
| + | | |
| + | | 0x7000F8E8 |
| + | |- |
| + | | |
| + | | 0x7000F8EC |
| + | |- |
| + | | |
| + | | 0x7000F8F0 |
| + | |- |
| + | | |
| + | | 0x7000F8F4 |
| + | |- |
| + | | |
| + | | 0x7000F8F8 |
| + | |- |
| + | | |
| + | | 0x7000F8FC |
| + | |- |
| + | | FUSE_PRODUCTION_MODE |
| + | | 0x7000F900 |
| + | |- |
| + | | FUSE_JTAG_SECUREID_VALID |
| + | | 0x7000F904 |
| + | |- |
| + | | FUSE_ODM_LOCK |
| + | | 0x7000F908 |
| + | |- |
| + | | FUSE_OPT_OPENGL_EN |
| + | | 0x7000F90C |
| + | |- |
| + | | FUSE_SKU_INFO |
| + | | 0x7000F910 |
| + | |- |
| + | | FUSE_CPU_SPEEDO_0_CALIB |
| + | | 0x7000F914 |
| + | |- |
| + | | FUSE_CPU_IDDQ_CALIB |
| + | | 0x7000F918 |
| + | |- |
| + | | FUSE_RESERVED_ODM22 |
| + | | 0x7000F91C |
| + | |- |
| + | | FUSE_RESERVED_ODM23 |
| + | | 0x7000F920 |
| + | |- |
| + | | FUSE_RESERVED_ODM24 |
| + | | 0x7000F924 |
| + | |- |
| + | | FUSE_OPT_FT_REV |
| + | | 0x7000F928 |
| + | |- |
| + | | FUSE_CPU_SPEEDO_1_CALIB |
| + | | 0x7000F92C |
| + | |- |
| + | | FUSE_CPU_SPEEDO_2_CALIB |
| + | | 0x7000F930 |
| + | |- |
| + | | FUSE_SOC_SPEEDO_0_CALIB |
| + | | 0x7000F934 |
| + | |- |
| + | | FUSE_SOC_SPEEDO_1_CALIB |
| + | | 0x7000F938 |
| + | |- |
| + | | FUSE_SOC_SPEEDO_2_CALIB |
| + | | 0x7000F93C |
| + | |- |
| + | | FUSE_SOC_IDDQ_CALIB |
| + | | 0x7000F940 |
| + | |- |
| + | | FUSE_RESERVED_ODM25 |
| + | | 0x7000F944 |
| + | |- |
| + | | FUSE_FA |
| + | | 0x7000F948 |
| + | |- |
| + | | FUSE_RESERVED_PRODUCTION |
| + | | 0x7000F94C |
| + | |- |
| + | | FUSE_HDMI_LANE0_CALIB |
| + | | 0x7000F950 |
| + | |- |
| + | | FUSE_HDMI_LANE1_CALIB |
| + | | 0x7000F954 |
| + | |- |
| + | | FUSE_HDMI_LANE2_CALIB |
| + | | 0x7000F958 |
| + | |- |
| + | | FUSE_HDMI_LANE3_CALIB |
| + | | 0x7000F95C |
| + | |- |
| + | | FUSE_ENCRYPTION_RATE |
| + | | 0x7000F960 |
| + | |- |
| + | | FUSE_PUBLIC_KEY0 |
| + | | 0x7000F964 |
| + | |- |
| + | | FUSE_PUBLIC_KEY1 |
| + | | 0x7000F968 |
| + | |- |
| + | | FUSE_PUBLIC_KEY2 |
| + | | 0x7000F96C |
| + | |- |
| + | | FUSE_PUBLIC_KEY3 |
| + | | 0x7000F970 |
| + | |- |
| + | | FUSE_PUBLIC_KEY4 |
| + | | 0x7000F974 |
| + | |- |
| + | | FUSE_PUBLIC_KEY5 |
| + | | 0x7000F978 |
| + | |- |
| + | | FUSE_PUBLIC_KEY6 |
| + | | 0x7000F97C |
| + | |- |
| + | | FUSE_PUBLIC_KEY7 |
| + | | 0x7000F980 |
| + | |- |
| + | | FUSE_TSENSOR1_CALIB |
| + | | 0x7000F984 |
| + | |- |
| + | | FUSE_TSENSOR2_CALIB |
| + | | 0x7000F988 |
| + | |- |
| + | | |
| + | | 0x7000F98C |
| + | |- |
| + | | FUSE_OPT_CP_REV |
| + | | 0x7000F990 |
| + | |- |
| + | | FUSE_OPT_PFG |
| + | | 0x7000F994 |
| + | |- |
| + | | FUSE_TSENSOR0_CALIB |
| + | | 0x7000F998 |
| + | |- |
| + | | FUSE_FIRST_BOOTROM_PATCH_SIZE |
| + | | 0x7000F99C |
| + | |- |
| + | | FUSE_SECURITY_MODE |
| + | | 0x7000F9A0 |
| + | |- |
| + | | FUSE_PRIVATE_KEY0 |
| + | | 0x7000F9A4 |
| + | |- |
| + | | FUSE_PRIVATE_KEY1 |
| + | | 0x7000F9A8 |
| + | |- |
| + | | FUSE_PRIVATE_KEY2 |
| + | | 0x7000F9AC |
| + | |- |
| + | | FUSE_PRIVATE_KEY3 |
| + | | 0x7000F9B0 |
| + | |- |
| + | | FUSE_PRIVATE_KEY4 |
| + | | 0x7000F9B4 |
| + | |- |
| + | | FUSE_ARM_JTAG_DIS |
| + | | 0x7000F9B8 |
| + | |- |
| + | | FUSE_BOOT_DEVICE_INFO |
| + | | 0x7000F9BC |
| + | |- |
| + | | FUSE_RESERVED_SW |
| + | | 0x7000F9C0 |
| + | |- |
| + | | FUSE_OPT_VP9_DISABLE |
| + | | 0x7000F9C4 |
| + | |- |
| + | | FUSE_RESERVED_ODM0 |
| + | | 0x7000F9C8 |
| + | |- |
| + | | FUSE_RESERVED_ODM1 |
| + | | 0x7000F9CC |
| + | |- |
| + | | FUSE_RESERVED_ODM2 |
| + | | 0x7000F9D0 |
| + | |- |
| + | | FUSE_RESERVED_ODM3 |
| + | | 0x7000F9D4 |
| + | |- |
| + | | FUSE_RESERVED_ODM4 |
| + | | 0x7000F9D8 |
| + | |- |
| + | | FUSE_RESERVED_ODM5 |
| + | | 0x7000F9DC |
| + | |- |
| + | | FUSE_RESERVED_ODM6 |
| + | | 0x7000F9E0 |
| + | |- |
| + | | FUSE_RESERVED_ODM7 |
| + | | 0x7000F9E4 |
| + | |- |
| + | | FUSE_OBS_DIS |
| + | | 0x7000F9E8 |
| + | |- |
| + | | |
| + | | 0x7000F9EC |
| + | |- |
| + | | FUSE_USB_CALIB |
| + | | 0x7000F9F0 |
| + | |- |
| + | | FUSE_SKU_DIRECT_CONFIG |
| + | | 0x7000F9F4 |
| + | |- |
| + | | FUSE_KFUSE_PRIVKEY_CTRL |
| + | | 0x7000F9F8 |
| + | |- |
| + | | FUSE_PACKAGE_INFO |
| + | | 0x7000F9FC |
| + | |- |
| + | | FUSE_OPT_VENDOR_CODE |
| + | | 0x7000FA00 |
| + | |- |
| + | | FUSE_OPT_FAB_CODE |
| + | | 0x7000FA04 |
| + | |- |
| + | | FUSE_OPT_LOT_CODE_0 |
| + | | 0x7000FA08 |
| + | |- |
| + | | FUSE_OPT_LOT_CODE_1 |
| + | | 0x7000FA0C |
| + | |- |
| + | | FUSE_OPT_WAFER_ID |
| + | | 0x7000FA10 |
| + | |- |
| + | | FUSE_OPT_X_COORDINATE |
| + | | 0x7000FA14 |
| + | |- |
| + | | FUSE_OPT_Y_COORDINATE |
| + | | 0x7000FA18 |
| + | |- |
| + | | FUSE_OPT_SEC_DEBUG_EN |
| + | | 0x7000FA1C |
| + | |- |
| + | | FUSE_OPT_OPS_RESERVED |
| + | | 0x7000FA20 |
| + | |- |
| + | | |
| + | | 0x7000FA24 |
| + | |- |
| + | | FUSE_GPU_IDDQ_CALIB |
| + | | 0x7000FA28 |
| + | |- |
| + | | FUSE_TSENSOR3_CALIB |
| + | | 0x7000FA2C |
| + | |- |
| + | | FUSE_CLOCK_BONDOUT0 |
| + | | 0x7000FA30 |
| + | |- |
| + | | FUSE_CLOCK_BONDOUT1 |
| + | | 0x7000FA34 |
| + | |- |
| + | | FUSE_RESERVED_ODM26 |
| + | | 0x7000FA38 |
| + | |- |
| + | | FUSE_RESERVED_ODM27 |
| + | | 0x7000FA3C |
| + | |- |
| + | | FUSE_RESERVED_ODM28 |
| + | | 0x7000FA40 |
| + | |- |
| + | | FUSE_OPT_SAMPLE_TYPE |
| + | | 0x7000FA44 |
| + | |- |
| + | | FUSE_OPT_SUBREVISION |
| + | | 0x7000FA48 |
| + | |- |
| + | | FUSE_OPT_SW_RESERVED_0 |
| + | | 0x7000FA4C |
| + | |- |
| + | | FUSE_OPT_SW_RESERVED_1 |
| + | | 0x7000FA50 |
| + | |- |
| + | | FUSE_TSENSOR4_CALIB |
| + | | 0x7000FA54 |
| + | |- |
| + | | FUSE_TSENSOR5_CALIB |
| + | | 0x7000FA58 |
| + | |- |
| + | | FUSE_TSENSOR6_CALIB |
| + | | 0x7000FA5C |
| + | |- |
| + | | FUSE_TSENSOR7_CALIB |
| + | | 0x7000FA60 |
| + | |- |
| + | | FUSE_OPT_PRIV_SEC_EN |
| + | | 0x7000FA64 |
| + | |- |
| + | | |
| + | | 0x7000FA68 |
| + | |- |
| + | | |
| + | | 0x7000FA6C |
| + | |- |
| + | | |
| + | | 0x7000FA70 |
| + | |- |
| + | | |
| + | | 0x7000FA74 |
| + | |- |
| + | | |
| + | | 0x7000FA78 |
| + | |- |
| + | | FUSE_FUSE2TSEC_DEBUG_DISABLE |
| + | | 0x7000FA7C |
| + | |- |
| + | | FUSE_TSENSOR_COMMON |
| + | | 0x7000FA80 |
| + | |- |
| + | | FUSE_OPT_CP_BIN |
| + | | 0x7000FA84 |
| + | |- |
| + | | FUSE_OPT_GPU_DISABLE |
| + | | 0x7000FA88 |
| + | |- |
| + | | FUSE_OPT_FT_BIN |
| + | | 0x7000FA8C |
| + | |- |
| + | | FUSE_OPT_DONE_MAP |
| + | | 0x7000FA90 |
| + | |- |
| + | | FUSE_RESERVED_ODM29 |
| + | | 0x7000FA94 |
| + | |- |
| + | | FUSE_APB2JTAG_DISABLE |
| + | | 0x7000FA98 |
| + | |- |
| + | | FUSE_ODM_INFO |
| + | | 0x7000FA9C |
| + | |- |
| + | | FUSE_ARM_CRYPT_DE_FEATURE |
| + | | 0x7000FAA8 |
| + | |- |
| + | | |
| + | | 0x7000FAB0 |
| + | |- |
| + | | |
| + | | 0x7000FAB4 |
| + | |- |
| + | | |
| + | | 0x7000FAB8 |
| + | |- |
| + | | |
| + | | 0x7000FABC |
| + | |- |
| + | | FUSE_WOA_SKU_FLAG |
| + | | 0x7000FAC0 |
| + | |- |
| + | | FUSE_ECO_RESERVE_1 |
| + | | 0x7000FAC4 |
| + | |- |
| + | | FUSE_GCPLEX_CONFIG_FUSE |
| + | | 0x7000FAC8 |
| + | |- |
| + | | FUSE_PRODUCTION_MONTH |
| + | | 0x7000FACC |
| + | |- |
| + | | FUSE_RAM_REPAIR_INDICATOR |
| + | | 0x7000FAD0 |
| + | |- |
| + | | FUSE_TSENSOR9_CALIB |
| + | | 0x7000FAD4 |
| + | |- |
| + | | FUSE_VMIN_CALIBRATION |
| + | | 0x7000FADC |
| + | |- |
| + | | FUSE_AGING_SENSOR_CALIBRATION |
| + | | 0x7000FAE0 |
| + | |- |
| + | | FUSE_DEBUG_AUTHENTICATION |
| + | | 0x7000FAE4 |
| + | |- |
| + | | FUSE_SECURE_PROVISION_INDEX |
| + | | 0x7000FAE8 |
| + | |- |
| + | | FUSE_SECURE_PROVISION_INFO |
| + | | 0x7000FAEC |
| + | |- |
| + | | FUSE_OPT_GPU_DISABLE_CP1 |
| + | | 0x7000FAF0 |
| + | |- |
| + | | FUSE_SPARE_ENDIS |
| + | | 0x7000FAF4 |
| + | |- |
| + | | FUSE_ECO_RESERVE_0 |
| + | | 0x7000FAF8 |
| + | |- |
| + | | FUSE_RESERVED_CALIB0 |
| + | | 0x7000FB04 |
| + | |- |
| + | | FUSE_RESERVED_CALIB1 |
| + | | 0x7000FB08 |
| + | |- |
| + | | FUSE_OPT_GPU_TPC0_DISABLE |
| + | | 0x7000FB0C |
| + | |- |
| + | | FUSE_OPT_GPU_TPC0_DISABLE_CP1 |
| + | | 0x7000FB10 |
| + | |- |
| + | | FUSE_OPT_CPU_DISABLE |
| + | | 0x7000FB14 |
| + | |- |
| + | | FUSE_OPT_CPU_DISABLE_CP1 |
| + | | 0x7000FB18 |
| + | |- |
| + | | FUSE_TSENSOR10_CALIB |
| + | | 0x7000FB1C |
| + | |- |
| + | | FUSE_TSENSOR10_CALIB_AUX |
| + | | 0x7000FB20 |
| + | |- |
| + | | |
| + | | 0x7000FB24 |
| + | |- |
| + | | |
| + | | 0x7000FB28 |
| + | |- |
| + | | |
| + | | 0x7000FB2C |
| + | |- |
| + | | |
| + | | 0x7000FB30 |
| + | |- |
| + | | |
| + | | 0x7000FB34 |
| + | |- |
| + | | FUSE_OPT_GPU_TPC0_DISABLE_CP2 |
| + | | 0x7000FB38 |
| + | |- |
| + | | FUSE_OPT_GPU_TPC1_DISABLE |
| + | | 0x7000FB3C |
| + | |- |
| + | | FUSE_OPT_GPU_TPC1_DISABLE_CP1 |
| + | | 0x7000FB40 |
| + | |- |
| + | | FUSE_OPT_GPU_TPC1_DISABLE_CP2 |
| + | | 0x7000FB44 |
| + | |- |
| + | | FUSE_OPT_CPU_DISABLE_CP2 |
| + | | 0x7000FB48 |
| + | |- |
| + | | FUSE_OPT_GPU_DISABLE_CP2 |
| + | | 0x7000FB4C |
| + | |- |
| + | | FUSE_USB_CALIB_EXT |
| + | | 0x7000FB50 |
| + | |- |
| + | | FUSE_RESERVED_FIELD |
| + | | 0x7000FB54 |
| + | |- |
| + | | FUSE_SPARE_REALIGNMENT_REG |
| + | | 0x7000FB7C |
| + | |- |
| + | | FUSE_SPARE_BIT_0 |
| + | | 0x7000FB80 |
| + | |- |
| + | | FUSE_SPARE_BIT_1 |
| + | | 0x7000FB84 |
| + | |- |
| + | | FUSE_SPARE_BIT_2 |
| + | | 0x7000FB88 |
| + | |- |
| + | | FUSE_SPARE_BIT_3 |
| + | | 0x7000FB8C |
| + | |- |
| + | | FUSE_SPARE_BIT_4 |
| + | | 0x7000FB90 |
| + | |- |
| + | | FUSE_SPARE_BIT_5 |
| + | | 0x7000FB94 |
| + | |- |
| + | | FUSE_SPARE_BIT_6 |
| + | | 0x7000FB98 |
| + | |- |
| + | | FUSE_SPARE_BIT_7 |
| + | | 0x7000FB9C |
| + | |- |
| + | | FUSE_SPARE_BIT_8 |
| + | | 0x7000FBA0 |
| + | |- |
| + | | FUSE_SPARE_BIT_9 |
| + | | 0x7000FBA4 |
| + | |- |
| + | | FUSE_SPARE_BIT_10 |
| + | | 0x7000FBA8 |
| + | |- |
| + | | FUSE_SPARE_BIT_11 |
| + | | 0x7000FBAC |
| + | |- |
| + | | FUSE_SPARE_BIT_12 |
| + | | 0x7000FBB0 |
| + | |- |
| + | | FUSE_SPARE_BIT_13 |
| + | | 0x7000FBB4 |
| + | |- |
| + | | FUSE_SPARE_BIT_14 |
| + | | 0x7000FBB8 |
| + | |- |
| + | | FUSE_SPARE_BIT_15 |
| + | | 0x7000FBBC |
| + | |- |
| + | | FUSE_SPARE_BIT_16 |
| + | | 0x7000FBC0 |
| + | |- |
| + | | FUSE_SPARE_BIT_17 |
| + | | 0x7000FBC4 |
| + | |- |
| + | | FUSE_SPARE_BIT_18 |
| + | | 0x7000FBC8 |
| + | |- |
| + | | FUSE_SPARE_BIT_19 |
| + | | 0x7000FBCC |
| + | |- |
| + | | FUSE_SPARE_BIT_20 |
| + | | 0x7000FBD0 |
| + | |- |
| + | | FUSE_SPARE_BIT_21 |
| + | | 0x7000FBD4 |
| + | |- |
| + | | FUSE_SPARE_BIT_22 |
| + | | 0x7000FBD8 |
| + | |- |
| + | | FUSE_SPARE_BIT_23 |
| + | | 0x7000FBDC |
| + | |- |
| + | | FUSE_SPARE_BIT_24 |
| + | | 0x7000FBE0 |
| + | |- |
| + | | FUSE_SPARE_BIT_25 |
| + | | 0x7000FBE4 |
| + | |- |
| + | | FUSE_SPARE_BIT_26 |
| + | | 0x7000FBE8 |
| + | |- |
| + | | FUSE_SPARE_BIT_27 |
| + | | 0x7000FBEC |
| + | |- |
| + | | FUSE_SPARE_BIT_28 |
| + | | 0x7000FBF0 |
| + | |- |
| + | | FUSE_SPARE_BIT_29 |
| + | | 0x7000FBF4 |
| + | |- |
| + | | FUSE_SPARE_BIT_30 |
| + | | 0x7000FBF8 |
| + | |- |
| + | | FUSE_SPARE_BIT_31 |
| + | | 0x7000FBFC |
| + | |} |
| + | |
| + | ==== FUSE_RESERVED_ODM28 ==== |
| + | {| class="wikitable" border="1" |
| + | ! Bits |
| + | ! Description |
| + | |- |
| + | | 0 |
| + | | RegulatorType |
| + | |} |
| + | |
| + | = Bitmap = |
| + | The actual hardware fuses are stored in a bitmap and may be programmed through the fuse driver after enabling fuse programming. |
| + | |
| + | Fuse numbers are relative to the start of the fuse bitmap where each element is a 4 byte word and has a redundant alias. A single fuse write operation must always write the same value to '''fuse_bitmap + ((fuse_number + 0) << 2)''' (PRIMARY_ALIAS) and '''fuse_bitmap + ((fuse_number + 1) << 2)''' (REDUNDANT_ALIAS). However, spare bits and all fuses afterwards in the fuse bitmap, no longer have a redundant alias. |
| | | |
| + | == Erista == |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| ! Name | | ! Name |
Line 2,266: |
Line 2,844: |
| This patch forces the value of [[Security_Engine|SE_TZRAM_SECURITY]] to be 0x01 instead of restoring it from the saved SE context. | | This patch forces the value of [[Security_Engine|SE_TZRAM_SECURITY]] to be 0x01 instead of restoring it from the saved SE context. |
| | | |
− | == Anti-downgrade ==
| + | = Anti-downgrade = |
| The first bootloader verifies [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]] to prevent downgrading. | | The first bootloader verifies [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]] to prevent downgrading. |
| How many fuses are expected to be burnt depends the device's unit type as below. | | How many fuses are expected to be burnt depends the device's unit type as below. |