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| | 0x40080008 || 8 || NVHOST_IOCTL_CHANNEL_SET_CLK_RATE | | | 0x40080008 || 8 || NVHOST_IOCTL_CHANNEL_SET_CLK_RATE |
| |- | | |- |
− | | 0xC0??0009 || Variable || NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER | + | | 0xC0??0009 || Variable || [[#NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER]] |
| |- | | |- |
− | | 0xC0??000A || Variable || NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER | + | | 0xC0??000A || Variable || [[#NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER]] |
| |- | | |- |
| | 0x00000013 || 0 || NVHOST_IOCTL_CHANNEL_SET_TIMEOUT_EX | | | 0x00000013 || 0 || NVHOST_IOCTL_CHANNEL_SET_TIMEOUT_EX |
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| | 0xC0??0024 || Variable || NVHOST_IOCTL_CHANNEL_SUBMIT_EX | | | 0xC0??0024 || Variable || NVHOST_IOCTL_CHANNEL_SUBMIT_EX |
| |- | | |- |
− | | 0xC0??0025 || Variable || NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER_EX | + | | 0xC0??0025 || Variable || [[#NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER_EX]] |
| |- | | |- |
− | | 0xC0??0026 || Variable || NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER_EX | + | | 0xC0??0026 || Variable || [[#NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER_EX]] |
| |- style="border-top: double" | | |- style="border-top: double" |
| | 0x40044801 || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD]] | | | 0x40044801 || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD]] |
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| === NVHOST_IOCTL_CHANNEL_GET_MODMUTEX === | | === NVHOST_IOCTL_CHANNEL_GET_MODMUTEX === |
| Stubbed. Does a debug print and returns 0. | | Stubbed. Does a debug print and returns 0. |
| + | |
| + | === NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER === |
| + | Uses '''nvmap_pin''' internally to pin a given number of nvmap handles to an appropriate device physical address. |
| + | |
| + | struct handle { |
| + | u32 handle_id_in; // nvmap handle to map |
| + | u32 phys_addr_out; // returned device physical address mapped to the handle |
| + | }; |
| + | |
| + | struct { |
| + | __in u32 num_handles; // number of nvmap handles to map |
| + | __in u32 padding; // ignored |
| + | __in u8 is_compr; // memory to map is compressed |
| + | __in u8 padding[3]; // ignored |
| + | __inout struct handle handles[]; // depends on num_handles |
| + | }; |
| + | |
| + | === NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER === |
| + | Uses '''nvmap_unpin''' internally to unpin a given number of nvmap handles from their device physical address. |
| + | |
| + | struct handle { |
| + | u32 handle_id_in; // nvmap handle to unmap |
| + | u32 padding; // ignored |
| + | }; |
| + | |
| + | struct { |
| + | __in u32 num_handles; // number of nvmap handles to unmap |
| + | __in u32 padding; // ignored |
| + | __in u8 is_compr; // memory to unmap is compressed |
| + | __in u8 padding[3]; // ignored |
| + | __inout struct handle handles[]; // depends on num_handles |
| + | }; |
| + | |
| + | === NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER_EX === |
| + | Same as [[#NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER|NVHOST_IOCTL_CHANNEL_MAP_CMD_BUFFER]], but calls '''nvmap_unpin''' internally in case of error. |
| + | |
| + | === NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER_EX === |
| + | Same as [[#NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER|NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER]]. |
| | | |
| === NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD === | | === NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD === |
| Binds a nvmap object to this channel. Identical to Linux driver. | | Binds a nvmap object to this channel. Identical to Linux driver. |
− |
| |
− | This ioctl is a no-op in the Linux driver, not sure about Switch?
| |
| | | |
| struct { | | struct { |
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| __in u32 num_entries; | | __in u32 num_entries; |
| __in u32 flags; | | __in u32 flags; |
− | __in u32 unk0; // 1 works | + | __in u32 unk0; |
| __in u32 unk1; | | __in u32 unk1; |
| __in u32 unk2; | | __in u32 unk2; |
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| Submits a gpfifo object (async version). Exclusive to the Switch. | | Submits a gpfifo object (async version). Exclusive to the Switch. |
| | | |
| + | struct fence { |
| + | u32 syncpt_id; |
| + | u32 syncpt_value; |
| + | }; |
| + | |
| + | struct gpfifo_entry { |
| + | u64 entry; // gpu_iova | (unk_2bits << 40) | (size << 42) | (unk_flag << 63) |
| + | }; |
| + | |
| struct { | | struct { |
− | u64 __gpfifo; // in (pointer to gpfifo fence structs; ignored) | + | __in u64 gpfifo; // (ignored) pointer to gpfifo fence structs |
− | u32 __num_entries; // in (number of fence objects being submitted) | + | __in u32 num_entries; // number of fence objects being submitted |
− | u32 __flags; // in | + | __in u32 flags; |
− | struct fence __fence_out; // out (returned new fence object for others to wait on) | + | __inout struct fence fence_out; // returned new fence object for others to wait on |
− | struct gpfifo_entry __entries[]; // in (depends on __num_entries) | + | __in struct gpfifo_entry entries[]; // depends on num_entries |
| }; | | }; |
| | | |
| === NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX2 === | | === NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX2 === |
| Allocates gpfifo entries with additional parameters and returns a fence. Exclusive to the Switch. | | Allocates gpfifo entries with additional parameters and returns a fence. Exclusive to the Switch. |
− |
| + | |
| + | struct fence { |
| + | u32 syncpt_id; |
| + | u32 syncpt_value; |
| + | }; |
| + | |
| struct { | | struct { |
− | u32 __num_entries; // in | + | __in u32 num_entries; |
− | u32 __flags; // in | + | __in u32 flags; |
− | u32 __unk0; // in (1 works) | + | __in u32 unk0; |
− | struct fence __fence_out; // out | + | __inout struct fence fence_out; // returned new fence object for others to wait on |
− | u32 __unk1; // in | + | __in u32 unk1; |
− | u32 __unk2; // in | + | __in u32 unk2; |
− | u32 __unk3; // in | + | __in u32 unk3; |
| }; | | }; |
| | | |