Line 483:
Line 483:
| 0x04
| 0x04
|-
|-
−
| TSEC_SCP_AES_STAT
+
| [[#TSEC_SCP_AES_STAT|TSEC_SCP_AES_STAT]]
| 0x54501458
| 0x54501458
| 0x04
| 0x04
Line 1,492:
Line 1,492:
0x0140: cenc (fuc5 opcode 0xD0)
0x0140: cenc (fuc5 opcode 0xD0)
0x0150: cdec (fuc5 opcode 0xD4)
0x0150: cdec (fuc5 opcode 0xD4)
−
0x0160: csigunk (fuc5 opcode 0xD8)
+
0x0160: csigauth (fuc5 opcode 0xD8)
0x0170: csigenc (fuc5 opcode 0xDC)
0x0170: csigenc (fuc5 opcode 0xDC)
0x0180: csigclr (fuc5 opcode 0xE0)
0x0180: csigclr (fuc5 opcode 0xE0)
Line 1,501:
Line 1,501:
Contains information on the last crypto instruction executed.
Contains information on the last crypto instruction executed.
+
+
== TSEC_SCP_AES_STAT ==
+
{| class="wikitable" border="1"
+
! Bits
+
! Description
+
|-
+
| 0-4
+
| First opcode
+
|-
+
| 5-9
+
| Second opcode
+
|-
+
| 15-16
+
| AES operation
+
0: Encryption
+
1: Decryption
+
2: Key expansion
+
3: Key reverse expansion
+
|}
+
+
Contains information on the last AES sequence executed.
=== TSEC_SCP_IRQSTAT ===
=== TSEC_SCP_IRQSTAT ===
Line 2,909:
Line 2,930:
Exit from Authenticated Mode must poke a special register before leaving authenticated code pages and a failure to do this would result in the Falcon core halting. Every Falcon based unit (TSEC, NVDEC, VIC) must map this register in their engine-specific subset of registers. In TSEC's case, the register is [[#TSEC_SCP_CTL_MODE|TSEC_SCP_CTL_MODE]].
Exit from Authenticated Mode must poke a special register before leaving authenticated code pages and a failure to do this would result in the Falcon core halting. Every Falcon based unit (TSEC, NVDEC, VIC) must map this register in their engine-specific subset of registers. In TSEC's case, the register is [[#TSEC_SCP_CTL_MODE|TSEC_SCP_CTL_MODE]].
+
+
=== csigauth ===
+
<code>00000000: f5 3c XY d8 csigauth $cY $cX</code>
+
+
This instruction takes 2 crypto registers as operands and is automatically executed when jumping to a code region previously uploaded as secret.
+
+
Under certain circumstances, it is possible to observe this instruction being briefly written to [[#TSEC_SCP_INSN_STAT|TSEC_SCP_INSN_STAT]] as "csigauth $c4 $c6" while the opcodes in [[#TSEC_SCP_AES_STAT|TSEC_SCP_AES_STAT]] are set to "cxsin" and "csigauth", respectively.
=== csigclr ===
=== csigclr ===