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Line 17:
Line 17: − + + Line 26:
Line 27: − + + + + + + Line 57:
Line 63: − + − + Line 74:
Line 80: − + Line 98:
Line 104: − + − + Line 109:
Line 115: + + Line 141:
Line 149: − + Line 186:
Line 194: − + + − ;Renesas + − : Uses package: LGA, TSOP-48+ − : Uses card id: 0x23+ − + − −
→Manufacturers
= Pinout =
= Pinout =
Note: Pins 1 and 2 act as one when receiving data from the chip.
Note: Pins 1 and 2 act as one when receiving data from the ASIC chip.
[[File:Gamecard-pinout.png|400px]]
[[File:Gamecard-pinout.png|400px]]
! Description
! Description
|-
|-
| 1, 2
| 1
| GND
| Input
| Ground
|-
| 2
| CD#
| CD#
| Output
| Output
|-
|-
| 8
| 8
| VCC 3.3v
| VCC 3.1v
| Input
| Input
|
| Power (3.1V) for Internal Core
|-
|-
| 9
| 9
| VCC 1.8v
| VCC 1.8v
| Input
| Input
|
| Power (1.8V) for I/O
|-
|-
| 12
| 12
| 16
| 16
| GND
| GND
|
| Input
|
| Ground
|-
|-
| 17
| 17
All IO use 1.8V for logic HIGH and 0V for logic LOW.
All IO use 1.8V for logic HIGH and 0V for logic LOW.
Data pins are approximately 0.75mm in width and are in order of length: 9mm (pin 16), 8mm (pins 17, 5), 6mm (pins 1&2) 3mm (pins 3, 4, 6, 7, 9, 10, 12, 13, 14, 15).
= Slot Pinout =
= Slot Pinout =
|-
|-
| 8
| 8
| VCC 3.3v
| VCC 3.1v
|-
|-
| 9
| 9
= Manufacturers =
= Manufacturers =
;MegaChips
;MegaChips (outsourced to Macronix)
: Uses package: LGA, TSOP-48
: Uses package: LGA, TSOP-48
: Uses card id: 0xC2
: Uses card id: 0xC2
;Lapis
;Lapis
: Uses package: LGA, TSOP-48
: Uses package: LGA, TSOP-48
: Uses card id: 0xAE
: Uses card id: 0xAE
;LSI Logic (?)
: Uses package: LGA
;SanDisk?
: Uses card id: 0x36
: Uses package: ??
: Uses card id: 0x45 ?