2,787
edits
Changes
no edit summary
! Newest hardware model/revision this flaw was checked for
! Newest hardware model/revision this flaw was checked for
! Timeframe this was discovered
! Timeframe this was discovered
! Public disclosure timeframe
! Discovered by
! Discovered by
|-
|-
| No public hardware exploits
| GMMU DMA attack
|
| The Switch's GPU includes a separate MMU (GMMU) that is allowed to bypass the system's IOMMU (SMMU). By accessing the GPU's MMIO region and manipulating the page table entires in the GMMU an attacker can read/write any portion of the DRAM except memory carveouts.
|
| None
|
| [[4.1.0]]
|
| Summer 2017
|
| December 28, 2017
| [[User:hexkyz|hexkyz]], [[User:SciresM|SciresM]] and [[User:qlutoo|qlutoo]]
|-
|-
|}
|}
| ~October
| ~October
| 17 October
| 17 October
| plutoo
| [[User:qlutoo|qlutoo]]
|-
|-
|}
|}
| April 2017
| April 2017
| On exploit's fix in [[3.0.0]]
| On exploit's fix in [[3.0.0]]
| qlutoo, Reswitched team (independently)
| [[User:qlutoo|qlutoo]], Reswitched team (independently)
|-
|-
| Unchecked domain ID in common IPC code
| Unchecked domain ID in common IPC code
| ~July 2017
| ~July 2017
| 20 July 2017
| 20 July 2017
| hthh
| [[User:hthh|hthh]]
|}
|}