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Line 181: Line 181:     
== IsPoweredOn ==
 
== IsPoweredOn ==
Takes an u32 '''PowerControlTarget''' and returns a bool indicating the status of the requested [[#Voltage|voltage block]].
+
Takes a [[#PowerDomain|PowerDomain]] and returns a bool indicating the status of the requested voltage block.
    
== GetVoltage ==
 
== GetVoltage ==
Takes an u32 '''PowerControlTarget''' and returns an u32 voltage value for the requested [[#Voltage|voltage block]].
+
Takes a [[#PowerDomain|PowerDomain]] and returns an u32 voltage value for the requested voltage block.
 
  −
== Modules ==
  −
These are "nn::pcv::Module_X" where X is the power, clock and reset block name.
  −
 
  −
[8.0.0+] Every module name is now mapped to an ID.
  −
 
  −
=== Power Switch / Clocking / Reset ===
  −
{| class="wikitable" border="1"
  −
|-
  −
! Name || ID || Block || Rail || Notes
  −
|-
  −
|  0 || 0x40000001 || CpuBus || vdd_cpu ||
  −
|-
  −
|  1 || 0x40000002 || GPU || vdd_gpu ||
  −
|-
  −
|  2 || 0x40000003 || I2S1 || vdd_soc ||
  −
|-
  −
|  3 || 0x40000004 || I2S2 || vdd_soc ||
  −
|-
  −
|  4 || 0x40000005 || I2S3 || vdd_soc ||
  −
|-
  −
|  5 || 0x40000006 || PWM || vdd_soc ||
  −
|-
  −
|  6 || 0x02000001 || I2C1 || vdd_soc ||
  −
|-
  −
|  7 || 0x02000002 || I2C2 || vdd_soc ||
  −
|-
  −
|  8 || 0x02000003 || I2C3 || vdd_soc ||
  −
|-
  −
|  9 || 0x02000004 || I2C4 || vdd_soc ||
  −
|-
  −
| 10 || 0x02000005 || I2C5 || vdd_soc ||
  −
|-
  −
| 11 || 0x02000006 || I2C6 || vdd_soc ||
  −
|-
  −
| 12 || 0x07000000 || SPI1 || vdd_soc ||
  −
|-
  −
| 13 || 0x07000001 || SPI2 || vdd_soc ||
  −
|-
  −
| 14 || 0x07000002 || SPI3 || vdd_soc ||
  −
|-
  −
| 15 || 0x07000003 || SPI4 || vdd_soc ||
  −
|-
  −
| 16 || 0x40000011 || DISP1 || vdd_soc ||
  −
|-
  −
| 17 || 0x40000012 || DISP2 || vdd_soc ||
  −
|-
  −
| 18 || 0x40000013 || ISP || - || Not an actual block. Used for debug.
  −
|-
  −
| 19 || 0x40000014 || VI || - || Not an actual block. Used for debug.
  −
|-
  −
| 20 || 0x40000015 || SDMMC1 || vdd_soc ||
  −
|-
  −
| 21 || 0x40000016 || SDMMC2 || vdd_soc ||
  −
|-
  −
| 22 || 0x40000017 || SDMMC3 || vdd_soc ||
  −
|-
  −
| 23 || 0x40000018 || SDMMC4 || vdd_soc ||
  −
|-
  −
| 24 || 0x40000019 || OWR || - || Not an actual block. Used for debug.
  −
|-
  −
| 25 || 0x4000001A || CSITE || vdd_soc ||
  −
|-
  −
| 26 || 0x4000001B || TSEC || vdd_soc ||
  −
|-
  −
| 27 || 0x4000001C || MSELECT || vdd_soc ||
  −
|-
  −
| 28 || 0x4000001D || HDA2CODEC_2X || vdd_soc ||
  −
|-
  −
| 29 || 0x4000001E || ACTMON || vdd_soc ||
  −
|-
  −
| 30 || 0x4000001F || I2C_SLOW || vdd_soc ||
  −
|-
  −
| 31 || 0x40000020 || SOR1 || vdd_soc ||
  −
|-
  −
| 32 || 0x40000021 || SATA || - || Not an actual block. Used for debug.
  −
|-
  −
| 33 || 0x40000022 || HDA || vdd_soc ||
  −
|-
  −
| 34 || 0x40000023 || XUSB_CORE_HOST || vdd_soc ||
  −
|-
  −
| 35 || 0x40000024 || XUSB_FALCON || vdd_soc ||
  −
|-
  −
| 36 || 0x40000025 || XUSB_FS || vdd_soc ||
  −
|-
  −
| 37 || 0x40000026 || XUSB_CORE_DEV || vdd_soc ||
  −
|-
  −
| 38 || 0x40000027 || XUSB_SS_HOSTDEV || vdd_soc ||
  −
|-
  −
| 39 || 0x03000001 || UARTA || vdd_soc ||
  −
|-
  −
| 40 || 0x35000405 || UARTB || vdd_soc ||
  −
|-
  −
| 41 || 0x3500040F || UARTC || vdd_soc ||
  −
|-
  −
| 42 || 0x37000001 || UARTD || vdd_soc ||
  −
|-
  −
| 43 || 0x4000002C || HOST1X || vdd_soc ||
  −
|-
  −
| 44 || 0x4000002D || ENTROPY || vdd_soc ||
  −
|-
  −
| 45 || 0x4000002E || SOC_THERM || vdd_soc ||
  −
|-
  −
| 46 || 0x4000002F || VIC || vdd_soc ||
  −
|-
  −
| 47 || 0x40000030 || NVENC || vdd_soc ||
  −
|-
  −
| 48 || 0x40000031 || NVJPG || vdd_soc ||
  −
|-
  −
| 49 || 0x40000032 || NVDEC || vdd_soc ||
  −
|-
  −
| 50 || 0x40000033 || QSPI || vdd_soc ||
  −
|-
  −
| 51 || 0x40000034 || VI_I2C || - || Not an actual block. Used for debug.
  −
|-
  −
| 52 || 0x40000035 || TSECB || vdd_soc ||
  −
|-
  −
| 53 || 0x40000036 || APE || vdd_soc ||
  −
|-
  −
| 54 || 0x40000037 || ACLK || vdd_soc ||
  −
|-
  −
| 55 || 0x40000038 || UARTAPE || vdd_soc ||
  −
|-
  −
| 56 || 0x40000039 || EMC || vdd_soc ||
  −
|-
  −
| 57 || 0x4000003A || PLLE0 || vdd_soc ||
  −
|-
  −
| 58 || 0x4000003B || PLLE0 || vdd_soc ||
  −
|-
  −
| 59 || 0x4000003C || DSI || vdd_soc ||
  −
|-
  −
| 60 || 0x4000003D || MAUD || vdd_soc ||
  −
|-
  −
| 61 || 0x4000003E || DPAUX1 || vdd_soc ||
  −
|-
  −
| 62 || 0x4000003F || MIPI_CAL || vdd_soc ||
  −
|-
  −
| 63 || 0x40000040 || UART_FST_MIPI_CAL || vdd_soc ||
  −
|-
  −
| 64 || 0x40000041 || OSC || vdd_soc ||
  −
|-
  −
| 65 || 0x40000042 || SCLK || vdd_soc ||
  −
|-
  −
| 66 || 0x40000043 || SOR_SAFE || vdd_soc ||
  −
|-
  −
| 67 || 0x40000044 || XUSB_SS || vdd_soc ||
  −
|-
  −
| 68 || 0x40000045 || XUSB_HOST || vdd_soc ||
  −
|-
  −
| 69 || 0x40000046 || XUSB_DEV || vdd_soc ||
  −
|-
  −
| 70 || 0x40000047 || EXTPERIPH1 || vdd_soc ||
  −
|-
  −
| 71 || 0x40000048 || AHUB || vdd_soc ||
  −
|-
  −
| 72 || 0x40000049 || HDA2HDMICODEC || vdd_soc ||
  −
|-
  −
| 73 || 0x4000004A || PLLP5 || vdd_soc ||
  −
|-
  −
| 74 || 0x4000004B || USBD || vdd_soc ||
  −
|-
  −
| 75 || 0x4000004C || USB2 || vdd_soc ||
  −
|-
  −
| 76 || 0x4000004D || PCIE || vdd_soc ||
  −
|-
  −
| 77 || 0x4000004E || AFI || vdd_soc ||
  −
|-
  −
| 78 || 0x4000004F || PCIEXCLK || vdd_soc ||
  −
|-
  −
| 79 || 0x40000050 || PEX_USB_UPHY || vdd_soc ||
  −
|-
  −
| 80 || 0x40000051 || XUSB_PADCTL || vdd_soc ||
  −
|-
  −
| 81 || 0x40000052 || APBDMA || vdd_soc ||
  −
|-
  −
| 82 || 0x40000053 || USB2_TRK || vdd_soc ||
  −
|-
  −
| 83 || 0x40000054 || PLLE0 || vdd_soc ||
  −
|-
  −
| 84 || 0x40000055 || PLLE0 || vdd_soc ||
  −
|-
  −
| 85 || 0x40000056 || CEC || vdd_soc ||
  −
|-
  −
| [6.0.0+] 86 || 0x40000057 || EXTPERIPH2 || vdd_soc ||
  −
|}
  −
 
  −
=== Voltage ===
  −
{| class="wikitable" border="1"
  −
|-
  −
! Name || Block || Notes
  −
|-
  −
|  0 || max77620_sd0 ||
  −
|-
  −
|  1 || max77620_sd1 ||
  −
|-
  −
|  2 || max77620_sd2 ||
  −
|-
  −
|  3 || max77620_sd3 ||
  −
|-
  −
|  4 || max77620_ldo0 || 1.2v
  −
|-
  −
|  5 || max77620_ldo1 ||
  −
|-
  −
|  6 || max77620_ldo2 || SDcard power, 1.8v - 3.3v
  −
|-
  −
|  7 || max77620_ldo3 || GC ASIC 3.1v
  −
|-
  −
|  8 || max77620_ldo4 || RTC power, 0.85v
  −
|-
  −
|  9 || max77620_ldo5 || GC ASIC 1.8v
  −
|-
  −
| 10 || max77620_ldo6 || AVDD touchscreen, 2.9v
  −
|-
  −
| 11 || max77620_ldo7 ||
  −
|-
  −
| 12 || max77620_ldo8 || DisplayPort, 1.05v
  −
|-
  −
| 13 || max77621_cpu ||
  −
|-
  −
| 14 || max77621_gpu ||
  −
|-
  −
| [6.0.0+] 15 || max77812_cpu ||
  −
|-
  −
| [6.0.0+] 16 || max77812_gpu ||
  −
|-
  −
| [6.0.0+] 17 || max77812_dram ||
  −
|}
  −
 
  −
Note: max77620 GPIOs are only used internally by the driver during init, and not exposed via an API.
      
= pcv:arb =
 
= pcv:arb =
Line 462: Line 233:     
== OpenSession ==
 
== OpenSession ==
Takes an u32 '''ModuleID''', an u32 '''ModuleUnk''' and returns an [[#IClkrstSession]].
+
Takes a [[#Module|DeviceCode]] and an u32. Returns an [[#IClkrstSession]].
    
== GetClockModuleNumLimit ==
 
== GetClockModuleNumLimit ==
Line 512: Line 283:     
== ReleaseControl ==
 
== ReleaseControl ==
Takes an u32 '''ModuleID'''. No output.
+
Takes a [[#Module|Module]]. No output.
    
= rgltr =
 
= rgltr =
Line 533: Line 304:     
== OpenSession ==
 
== OpenSession ==
Takes an u32 '''ModuleID''' and returns an [[#IRegulatorSession]].
+
Takes a [[#PowerDomain|DeviceCode]] and returns an [[#IRegulatorSession]].
    
== GetPowerModuleNumLimit ==
 
== GetPowerModuleNumLimit ==
Line 588: Line 359:     
== GetRtcTime ==
 
== GetRtcTime ==
Same as GetRtcTime from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#Known_Devices_2|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
+
Same as GetRtcTime from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#I2cDevice|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
    
== SetRtcTime ==
 
== SetRtcTime ==
Same as SetRtcTime from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#Known_Devices_2|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
+
Same as SetRtcTime from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#I2cDevice|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
    
== SetUpRtcResetOnShutdown ==
 
== SetUpRtcResetOnShutdown ==
Takes an u8 '''DoReset''' and a [[Bus_services#Known_Devices_2|DeviceCode]]. Similar to SetUpRtcResetOnShutdown from [[#bpc:r|bpc:r]], but this version assigns the provided boolean value on a per-client basis (instead of a global variable) and checks it when the current [[PSC_services#Power_Management_States|power state]] is "ReadyShutdown".
+
Takes an u8 '''DoReset''' and a [[Bus_services#I2cDevice|DeviceCode]]. Similar to SetUpRtcResetOnShutdown from [[#bpc:r|bpc:r]], but this version assigns the provided boolean value on a per-client basis (instead of a global variable) and checks it when the current [[PSC_services#Power_Management_States|power state]] is "ReadyShutdown".
    
== GetRtcResetDetected ==
 
== GetRtcResetDetected ==
Same as GetRtcResetDetected from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#Known_Devices_2|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
+
Same as GetRtcResetDetected from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#I2cDevice|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
    
== ClearRtcResetDetected ==
 
== ClearRtcResetDetected ==
Same as ClearRtcResetDetected from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#Known_Devices_2|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
+
Same as ClearRtcResetDetected from [[#bpc:r|bpc:r]], but takes an extra [[Bus_services#I2cDevice|DeviceCode]], which [[#bpc:r|bpc:r]] hardcodes to 0x3B000001 (max77620_rtc0) instead.
    
= time:u, time:a, time:s =
 
= time:u, time:a, time:s =
Line 863: Line 634:     
This is an 0x18-byte struct. This stores timezone info.
 
This is an 0x18-byte struct. This stores timezone info.
 +
 +
= Module =
 +
This is "nn::pcv::Module".
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Name || DeviceCode || Block || Rail || Notes
 +
|-
 +
|  0 || 0x40000001 || CpuBus || vdd_cpu ||
 +
|-
 +
|  1 || 0x40000002 || GPU || vdd_gpu ||
 +
|-
 +
|  2 || 0x40000003 || I2S1 || vdd_soc ||
 +
|-
 +
|  3 || 0x40000004 || I2S2 || vdd_soc ||
 +
|-
 +
|  4 || 0x40000005 || I2S3 || vdd_soc ||
 +
|-
 +
|  5 || 0x40000006 || PWM || vdd_soc ||
 +
|-
 +
|  6 || 0x02000001 || I2C1 || vdd_soc ||
 +
|-
 +
|  7 || 0x02000002 || I2C2 || vdd_soc ||
 +
|-
 +
|  8 || 0x02000003 || I2C3 || vdd_soc ||
 +
|-
 +
|  9 || 0x02000004 || I2C4 || vdd_soc ||
 +
|-
 +
| 10 || 0x02000005 || I2C5 || vdd_soc ||
 +
|-
 +
| 11 || 0x02000006 || I2C6 || vdd_soc ||
 +
|-
 +
| 12 || 0x07000000 || SPI1 || vdd_soc ||
 +
|-
 +
| 13 || 0x07000001 || SPI2 || vdd_soc ||
 +
|-
 +
| 14 || 0x07000002 || SPI3 || vdd_soc ||
 +
|-
 +
| 15 || 0x07000003 || SPI4 || vdd_soc ||
 +
|-
 +
| 16 || 0x40000011 || DISP1 || vdd_soc ||
 +
|-
 +
| 17 || 0x40000012 || DISP2 || vdd_soc ||
 +
|-
 +
| 18 || 0x40000013 || ISP || - || Not an actual block. Used for debug.
 +
|-
 +
| 19 || 0x40000014 || VI || - || Not an actual block. Used for debug.
 +
|-
 +
| 20 || 0x40000015 || SDMMC1 || vdd_soc ||
 +
|-
 +
| 21 || 0x40000016 || SDMMC2 || vdd_soc ||
 +
|-
 +
| 22 || 0x40000017 || SDMMC3 || vdd_soc ||
 +
|-
 +
| 23 || 0x40000018 || SDMMC4 || vdd_soc ||
 +
|-
 +
| 24 || 0x40000019 || OWR || - || Not an actual block. Used for debug.
 +
|-
 +
| 25 || 0x4000001A || CSITE || vdd_soc ||
 +
|-
 +
| 26 || 0x4000001B || TSEC || vdd_soc ||
 +
|-
 +
| 27 || 0x4000001C || MSELECT || vdd_soc ||
 +
|-
 +
| 28 || 0x4000001D || HDA2CODEC_2X || vdd_soc ||
 +
|-
 +
| 29 || 0x4000001E || ACTMON || vdd_soc ||
 +
|-
 +
| 30 || 0x4000001F || I2C_SLOW || vdd_soc ||
 +
|-
 +
| 31 || 0x40000020 || SOR1 || vdd_soc ||
 +
|-
 +
| 32 || 0x40000021 || SATA || - || Not an actual block. Used for debug.
 +
|-
 +
| 33 || 0x40000022 || HDA || vdd_soc ||
 +
|-
 +
| 34 || 0x40000023 || XUSB_CORE_HOST || vdd_soc ||
 +
|-
 +
| 35 || 0x40000024 || XUSB_FALCON || vdd_soc ||
 +
|-
 +
| 36 || 0x40000025 || XUSB_FS || vdd_soc ||
 +
|-
 +
| 37 || 0x40000026 || XUSB_CORE_DEV || vdd_soc ||
 +
|-
 +
| 38 || 0x40000027 || XUSB_SS_HOSTDEV || vdd_soc ||
 +
|-
 +
| 39 || 0x03000001 || UARTA || vdd_soc ||
 +
|-
 +
| 40 || 0x35000405 || UARTB || vdd_soc ||
 +
|-
 +
| 41 || 0x3500040F || UARTC || vdd_soc ||
 +
|-
 +
| 42 || 0x37000001 || UARTD || vdd_soc ||
 +
|-
 +
| 43 || 0x4000002C || HOST1X || vdd_soc ||
 +
|-
 +
| 44 || 0x4000002D || ENTROPY || vdd_soc ||
 +
|-
 +
| 45 || 0x4000002E || SOC_THERM || vdd_soc ||
 +
|-
 +
| 46 || 0x4000002F || VIC || vdd_soc ||
 +
|-
 +
| 47 || 0x40000030 || NVENC || vdd_soc ||
 +
|-
 +
| 48 || 0x40000031 || NVJPG || vdd_soc ||
 +
|-
 +
| 49 || 0x40000032 || NVDEC || vdd_soc ||
 +
|-
 +
| 50 || 0x40000033 || QSPI || vdd_soc ||
 +
|-
 +
| 51 || 0x40000034 || VI_I2C || - || Not an actual block. Used for debug.
 +
|-
 +
| 52 || 0x40000035 || TSECB || vdd_soc ||
 +
|-
 +
| 53 || 0x40000036 || APE || vdd_soc ||
 +
|-
 +
| 54 || 0x40000037 || ACLK || vdd_soc ||
 +
|-
 +
| 55 || 0x40000038 || UARTAPE || vdd_soc ||
 +
|-
 +
| 56 || 0x40000039 || EMC || vdd_soc ||
 +
|-
 +
| 57 || 0x4000003A || PLLE0 || vdd_soc ||
 +
|-
 +
| 58 || 0x4000003B || PLLE0 || vdd_soc ||
 +
|-
 +
| 59 || 0x4000003C || DSI || vdd_soc ||
 +
|-
 +
| 60 || 0x4000003D || MAUD || vdd_soc ||
 +
|-
 +
| 61 || 0x4000003E || DPAUX1 || vdd_soc ||
 +
|-
 +
| 62 || 0x4000003F || MIPI_CAL || vdd_soc ||
 +
|-
 +
| 63 || 0x40000040 || UART_FST_MIPI_CAL || vdd_soc ||
 +
|-
 +
| 64 || 0x40000041 || OSC || vdd_soc ||
 +
|-
 +
| 65 || 0x40000042 || SCLK || vdd_soc ||
 +
|-
 +
| 66 || 0x40000043 || SOR_SAFE || vdd_soc ||
 +
|-
 +
| 67 || 0x40000044 || XUSB_SS || vdd_soc ||
 +
|-
 +
| 68 || 0x40000045 || XUSB_HOST || vdd_soc ||
 +
|-
 +
| 69 || 0x40000046 || XUSB_DEV || vdd_soc ||
 +
|-
 +
| 70 || 0x40000047 || EXTPERIPH1 || vdd_soc ||
 +
|-
 +
| 71 || 0x40000048 || AHUB || vdd_soc ||
 +
|-
 +
| 72 || 0x40000049 || HDA2HDMICODEC || vdd_soc ||
 +
|-
 +
| 73 || 0x4000004A || PLLP5 || vdd_soc ||
 +
|-
 +
| 74 || 0x4000004B || USBD || vdd_soc ||
 +
|-
 +
| 75 || 0x4000004C || USB2 || vdd_soc ||
 +
|-
 +
| 76 || 0x4000004D || PCIE || vdd_soc ||
 +
|-
 +
| 77 || 0x4000004E || AFI || vdd_soc ||
 +
|-
 +
| 78 || 0x4000004F || PCIEXCLK || vdd_soc ||
 +
|-
 +
| 79 || 0x40000050 || PEX_USB_UPHY || vdd_soc ||
 +
|-
 +
| 80 || 0x40000051 || XUSB_PADCTL || vdd_soc ||
 +
|-
 +
| 81 || 0x40000052 || APBDMA || vdd_soc ||
 +
|-
 +
| 82 || 0x40000053 || USB2_TRK || vdd_soc ||
 +
|-
 +
| 83 || 0x40000054 || PLLE0 || vdd_soc ||
 +
|-
 +
| 84 || 0x40000055 || PLLE0 || vdd_soc ||
 +
|-
 +
| 85 || 0x40000056 || CEC || vdd_soc ||
 +
|-
 +
| [6.0.0+] 86 || 0x40000057 || EXTPERIPH2 || vdd_soc ||
 +
|}
 +
 +
= PowerDomain =
 +
This is "nn::pcv::PowerDomain".
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Name || DeviceCode || Block || Notes
 +
|-
 +
|  0 || 0x3A000080 || max77620_sd0 ||
 +
|-
 +
|  1 || 0x3A000081 || max77620_sd1 ||
 +
|-
 +
|  2 || 0x3A000082 || max77620_sd2 ||
 +
|-
 +
|  3 || 0x3A000083 || max77620_sd3 ||
 +
|-
 +
|  4 || 0x3A0000A0 || max77620_ldo0 || 1.2v
 +
|-
 +
|  5 || 0x3A0000A1 || max77620_ldo1 ||
 +
|-
 +
|  6 || 0x3A0000A2 || max77620_ldo2 || SDcard power, 1.8v - 3.3v
 +
|-
 +
|  7 || 0x3A0000A3 || max77620_ldo3 || GC ASIC 3.1v
 +
|-
 +
|  8 || 0x3A0000A4 || max77620_ldo4 || RTC power, 0.85v
 +
|-
 +
|  9 || 0x3A0000A5 || max77620_ldo5 || GC ASIC 1.8v
 +
|-
 +
| 10 || 0x3A0000A6 || max77620_ldo6 || AVDD touchscreen, 2.9v
 +
|-
 +
| 11 || 0x3A0000A7 || max77620_ldo7 ||
 +
|-
 +
| 12 || 0x3A0000A8 || max77620_ldo8 || DisplayPort, 1.05v
 +
|-
 +
| 13 || 0x3A000003 || max77621_cpu ||
 +
|-
 +
| 14 || 0x3A000004 || max77621_gpu ||
 +
|-
 +
| [6.0.0+] 15 || 0x3A000003 || max77812_cpu ||
 +
|-
 +
| [6.0.0+] 16 || 0x3A000004 || max77812_gpu ||
 +
|-
 +
| [6.0.0+] 17 || 0x3A000005 || max77812_dram ||
 +
|-
 +
| [8.0.0+] - || 0x3C000004 || || SDCard
 +
|-
 +
| [8.0.0+] - || 0x34000007 || || HDMI
 +
|-
 +
| [8.0.0+] - || 0x3500041A || || MCU
 +
|}
    
[[Category:Services]]
 
[[Category:Services]]

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