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| | 0x4D || svcSleepSystem || None || None | | | 0x4D || svcSleepSystem || None || None |
| |- | | |- |
− | | 0x4E || [[#svcReadWriteRegister]] || X1=reg_addr, W2=rw_mask, W3=in_val || W0=result, W1=out_val | + | | 0x4E || [[#svcReadWriteRegister]] || X1=reg_addr, W2=rw_mask, W3=in_val |
| + | R0=rw_mask, R1=in_val, R2=reg_addr_lower32, R3=reg_addr_upper32 |
| + | || W0=result, W1=out_val |
| |- | | |- |
| | 0x4F || svcSetProcessActivity || W0=process_handle, W1=bool || W0=result | | | 0x4F || svcSetProcessActivity || W0=process_handle, W1=bool || W0=result |
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| | 0x54 || [[#svcQueryPhysicalAddress]] || X1=addr || W0=result, X1=physaddr, X2=kerneladdr, X3=size | | | 0x54 || [[#svcQueryPhysicalAddress]] || X1=addr || W0=result, X1=physaddr, X2=kerneladdr, X3=size |
| |- | | |- |
− | | 0x55 || [[#svcQueryIoMapping]] || X1=physaddr, X2=size || W0=result, X1=virtaddr | + | | 0x55 || [[#svcQueryIoMapping]] || X1=physaddr, X2=size |
| + | R0=size, R2=physaddr_lower32, R3=physaddr_upper32 |
| + | || W0=result, X1=virtaddr |
| |- | | |- |
− | | 0x56 || [[#svcCreateDeviceAddressSpace]] || X1=dev_as_start_addr, X2=dev_as_end_addr || W0=result, W1=dev_as_handle | + | | 0x56 || [[#svcCreateDeviceAddressSpace]] || X1=dev_as_start_addr, X2=dev_as_end_addr |
| + | R0=dev_as_end_addr_lower32, R1=dev_as_end_addr_upper32, R2=dev_as_start_addr_lower32, R3=dev_as_start_addr_upper32 |
| + | || W0=result, W1=dev_as_handle |
| |- | | |- |
| | 0x57 || [[#svcAttachDeviceAddressSpace]] || W0=device, X1=dev_as_handle || W0=result | | | 0x57 || [[#svcAttachDeviceAddressSpace]] || W0=device, X1=dev_as_handle || W0=result |
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| | (In) W5 || R4 || u32 || ProcessorId | | | (In) W5 || R4 || u32 || ProcessorId |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |- | | |- |
− | | (Out) W1 || Handle<Thread> || Handle | + | | (Out) W1 || R1 || Handle<Thread> || Handle |
| |} | | |} |
| </div> | | </div> |
Line 1,018: |
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| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) X1 || u64 || RegAddr | + | | (In) X1 || R2, R3 || u64 || RegAddr |
| |- | | |- |
− | | (In) W2 || u64 || RwMask | + | | (In) W2 || R0 || u64 || RwMask |
| |- | | |- |
− | | (In) W3 || u64 || InValue | + | | (In) W3 || R1 || u64 || InValue |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |- | | |- |
− | | (Out) W1|| u64 || OutValue | + | | (Out) W1 || R1 || u64 || OutValue |
| |} | | |} |
| </div> | | </div> |
Line 1,183: |
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| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) X1 || u64 || PhysAddr | + | | (In) X1 || R2, R3 || u64 || PhysAddr |
| |- | | |- |
− | | (In) X2 || u64 || Size | + | | (In) X2 || R0 || u64 || Size |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |- | | |- |
− | | (Out) X1 || void* || VirtAddr | + | | (Out) X1 || R1 || void* || VirtAddr |
| |} | | |} |
| </div> | | </div> |
Line 1,202: |
Line 1,208: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) X1 || u64 || StartAddr | + | | (In) X1 || R2, R3 || u64 || StartAddr |
| |- | | |- |
− | | (In) X2 || u64 || EndAddr | + | | (In) X2 || R0, R1 || u64 || EndAddr |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |- | | |- |
− | | (Out) W1 || Handle<DeviceAddressSpace> || AddressSpaceHandle | + | | (Out) W1 || R1 || Handle<DeviceAddressSpace> || AddressSpaceHandle |
| |} | | |} |
| </div> | | </div> |