Line 198: |
Line 198: |
| | 0x58 || [[#svcDetachDeviceAddressSpace]] || W0=device, X1=dev_as_handle || W0=result | | | 0x58 || [[#svcDetachDeviceAddressSpace]] || W0=device, X1=dev_as_handle || W0=result |
| |- | | |- |
− | | 0x59 || [[#svcMapDeviceAddressSpaceByForce]] || W0=dev_as_handle, W1=proc_handle, X2=dev_map_addr, X3=dev_as_size, X4=dev_as_addr, W5=perm || W0=result | + | | 0x59 || [[#svcMapDeviceAddressSpaceByForce]] || W0=dev_as_handle, W1=proc_handle, X2=dev_map_addr, X3=dev_as_size, X4=dev_as_addr, W5=perm |
| + | R0=dev_as_handle, R1=proc_handle, R2=dev_map_addr_lower32, R3=dev_map_addr_upper32, R4=rev_as_size, R5=dev_as_addr_lower32, R6=dev_as_addr_upper32, R7=perm |
| + | || W0=result |
| |- | | |- |
− | | 0x5A || [[#svcMapDeviceAddressSpaceAligned]] || W0=dev_as_handle, W1=proc_handle, X2=dev_map_addr, X3=dev_as_size, X4=dev_as_addr, W5=perm || W0=result | + | | 0x5A || [[#svcMapDeviceAddressSpaceAligned]] || W0=dev_as_handle, W1=proc_handle, X2=dev_map_addr, X3=dev_as_size, X4=dev_as_addr, W5=perm |
| + | R0=dev_as_handle, R1=proc_handle, R2=dev_map_addr_lower32, R3=dev_map_addr_upper32, R4=rev_as_size, R5=dev_as_addr_lower32, R6=dev_as_addr_upper32, R7=perm |
| + | || W0=result |
| |- | | |- |
− | | 0x5B || svcMapDeviceAddressSpace || || | + | | 0x5B || svcMapDeviceAddressSpace || W1=dev_as_handle, W2=proc_handle, X3=dev_map_addr, X4=dev_as_size, X5=dev_as_addr, W6=perm |
| + | R0=dev_map_addr_lower32, R1=dev_as_handle, R2=proc_handle, R3=dev_map_addr_upper32, R4=dev_as_size, R5=dev_as_addr_lower32, R6=dev_as_addr_upper32, R7=perm |
| + | || W0=result, X1=mapped_size |
| + | R0=result, R1=mapped_size |
| |- | | |- |
− | | 0x5C || [[#svcUnmapDeviceAddressSpace]] || W0=dev_as_handle, W1=proc_handle, X2=dev_map_addr, X3=dev_as_size, X4=dev_as_addr || W0=result | + | | 0x5C || [[#svcUnmapDeviceAddressSpace]] || W0=dev_as_handle, W1=proc_handle, X2=dev_map_addr, X3=dev_as_size, X4=dev_as_addr |
| + | R0=dev_as_handle, R1=proc_handle, R2=dev_map_addr_lower32, R3=dev_map_addr_upper32, R4=dev_as_size, R5=dev_as_addr_lower32, R6=dev_as_addr_upper32 |
| + | || W0=result |
| |- | | |- |
− | | 0x5D || svcInvalidateProcessDataCache || W0=process_handle, X1=addr, X2=size || W0=size | + | | 0x5D || svcInvalidateProcessDataCache || W0=process_handle, X1=addr, X2=size |
| + | R0=process_handle, R1=size_lower32, R2=addr_lower32, R3=addr_upper32, R4=size_upper32 |
| + | || W0=size |
| |- | | |- |
− | | 0x5E || svcStoreProcessDataCache || W0=process_handle, X1=addr, X2=size || W0=size | + | | 0x5E || svcStoreProcessDataCache || W0=process_handle, X1=addr, X2=size |
| + | R0=process_handle, R1=size_lower32, R2=addr_lower32, R3=addr_upper32, R4=size_upper32 |
| + | || W0=size |
| |- | | |- |
− | | 0x5F || svcFlushProcessDataCache || W0=process_handle, X1=addr, X2=size || W0=size | + | | 0x5F || svcFlushProcessDataCache || W0=process_handle, X1=addr, X2=size |
| + | R0=process_handle, R1=size_lower32, R2=addr_lower32, R3=addr_upper32, R4=size_upper32 |
| + | || W0=size |
| |- | | |- |
− | | 0x60 || svcDebugActiveProcess || X1=pid || W0=result, W1=debug_handle | + | | 0x60 || svcDebugActiveProcess || X1=pid |
| + | R2=pid_lower32, R3=pid_upper32 |
| + | || W0=result, W1=debug_handle |
| |- | | |- |
| | 0x61 || svcBreakDebugProcess || W0=debug_handle || W0=result | | | 0x61 || svcBreakDebugProcess || W0=debug_handle || W0=result |
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Line 245: |
| | 0x66 || svcGetThreadList || X1=tids_out_ptr, W2=max_out, W3=debug_handle_or_zero || W0=result, X1=num_out | | | 0x66 || svcGetThreadList || X1=tids_out_ptr, W2=max_out, W3=debug_handle_or_zero || W0=result, X1=num_out |
| |- | | |- |
− | | 0x67 || svcGetDebugThreadContext || X0=ThreadContext*, X1=debug_handle, X2=thread_id, W3=[[#ThreadContextFlags]] || W0=result | + | | 0x67 || svcGetDebugThreadContext || X0=ThreadContext*, X1=debug_handle, X2=thread_id, W3=[[#ThreadContextFlags]] |
| + | R0=ThreadContext*, R1=debug_handle, R2=thread_id_lower32, R3=thread_id_upper32, R4=[[#ThreadContextFlags]] |
| + | || W0=result |
| |- | | |- |
− | | 0x68 || svcSetDebugThreadContext || W0=debug_handle, X1=thread_id, X2=ThreadContext*, W3=[[#ThreadContextFlags]] || W0=result | + | | 0x68 || svcSetDebugThreadContext || W0=debug_handle, X1=thread_id, X2=ThreadContext*, W3=[[#ThreadContextFlags]] |
| + | R0=debug_handle, R1=ThreadContext*, R2=thread_id_lower32, R3=thread_id_upper32, R4=[[#ThreadContextFlags]] |
| + | || W0=result |
| |- | | |- |
| | 0x69 || svcQueryDebugProcessMemory || X0=[[#MemoryInfo]]*, X2=debug_handle, X3=addr || W0=result, W1=PageInfo | | | 0x69 || svcQueryDebugProcessMemory || X0=[[#MemoryInfo]]*, X2=debug_handle, X3=addr || W0=result, W1=PageInfo |
Line 238: |
Line 259: |
| | 0x6B || svcWriteDebugProcessMemory || X0=debug_handle, X1=buffer*, X2=dst_addr, X3=size || W0=result | | | 0x6B || svcWriteDebugProcessMemory || X0=debug_handle, X1=buffer*, X2=dst_addr, X3=size || W0=result |
| |- | | |- |
− | | 0x6C || [[#svcSetHardwareBreakPoint]] || W0=HardwareBreakpointId, X1=watchpoint_flags/breakpoint_flags, X2=watchpoint_value/debug_handle || | + | | 0x6C || [[#svcSetHardwareBreakPoint]] || W0=HardwareBreakpointId, X1=watchpoint_flags/breakpoint_flags, X2=watchpoint_value/debug_handle |
| + | R0=HardwareBreakpointId, R1=value_lower32, R2=flags_lower32, R3=flags_upper32, R4=value_upper32 |
| + | || W0=result |
| |- | | |- |
− | | 0x6D || svcGetDebugThreadParam || X2=debug_handle, X3=thread_id, W4=[[#DebugThreadParam]] || W0=result, X1=out0, W2=out1 | + | | 0x6D || svcGetDebugThreadParam || X2=debug_handle, X3=thread_id, W4=[[#DebugThreadParam]] |
| + | R0=thread_id_lower32, R1=thread_id_upper32, R2=debug_handle, R3=[[#DebugThreadParam]] |
| + | || W0=result, X1=out0, W2=out1 |
| + | R0=result, R1=out0_lower32, R2=out0_upper32, R3=out1 |
| |- style="border-top: double" | | |- style="border-top: double" |
− | | 0x6F || [5.0.0+] [[#svcGetSystemInfo]] || X1=info_id, X2=handle, X3=info_sub_id || W0=result, X1=out | + | | 0x6F || [5.0.0+] [[#svcGetSystemInfo]] || X1=info_id, X2=handle, X3=info_sub_id |
| + | R1=info_sub_id_lower32, R2=info_id, R3=handle, R4=info_sub_id_upper32 |
| + | || W0=result, X1=out |
| + | R0=result, R1=out_lower32, R2=out_upper32 |
| |- | | |- |
− | | 0x70 || svcCreatePort || W2=max_sessions, W3=is_light, X4=name_ptr || W0=result, W1=serverport_handle, W2=clientport_handle | + | | 0x70 || svcCreatePort || W2=max_sessions, W3=is_light, X4=name_ptr |
| + | R0=name_ptr, R2=max_sessions, R3=is_light |
| + | || W0=result, W1=serverport_handle, W2=clientport_handle |
| |- | | |- |
| | 0x71 || svcManageNamedPort || X1=name_ptr, W2=max_sessions || W0=result, W1=serverport_handle | | | 0x71 || svcManageNamedPort || X1=name_ptr, W2=max_sessions || W0=result, W1=serverport_handle |
Line 250: |
Line 281: |
| | 0x72 || svcConnectToPort || W1=clientport_handle || W0=result, W1=session_handle | | | 0x72 || svcConnectToPort || W1=clientport_handle || W0=result, W1=session_handle |
| |- | | |- |
− | | 0x73 || [[#svcSetProcessMemoryPermission]] || W0=process_handle, X1=addr, X2=size, W3=perm || W0=result | + | | 0x73 || [[#svcSetProcessMemoryPermission]] || W0=process_handle, X1=addr, X2=size, W3=perm |
| + | R0=process_handle, R1=size_lower32, R2=addr_lower32, R3=addr_upper32, R4=size_upper32, R5=perm |
| + | || W0=result |
| |- | | |- |
− | | 0x74 || [[#svcMapProcessMemory]] || X0=dstaddr, W1=process_handle, X2=srcaddr, X3=size || W0=result | + | | 0x74 || [[#svcMapProcessMemory]] || X0=dstaddr, W1=process_handle, X2=srcaddr, X3=size |
| + | R0=dstaddr, R1=process_handle, R2=srcaddr_lower32, R3=srcaddr_upper32, R4=size |
| + | || W0=result |
| |- | | |- |
− | | 0x75 || [[#svcUnmapProcessMemory]] || X0=dstaddr, W1=process_handle, X2=srcaddr, X3=size || W0=result | + | | 0x75 || [[#svcUnmapProcessMemory]] || X0=dstaddr, W1=process_handle, X2=srcaddr, X3=size |
| + | R0=dstaddr, R1=process_handle, R2=srcaddr_lower32, R3=srcaddr_upper32, R4=size |
| + | || W0=result |
| |- | | |- |
− | | 0x76 || [[#svcQueryProcessMemory]] || X0=meminfo_ptr, W2=process_handle, X3=addr || W0=result, W1=pageinfo | + | | 0x76 || [[#svcQueryProcessMemory]] || X0=meminfo_ptr, W2=process_handle, X3=addr |
| + | R0=meminfo_ptr, R1=addr_lower32, R2=process_handle, R3=addr_upper32 |
| + | || W0=result, W1=pageinfo |
| |- | | |- |
− | | 0x77 || [[#svcMapProcessCodeMemory]] || W0=process_handle, X1=dstaddr, X2=srcaddr, X3=size || W0=result | + | | 0x77 || [[#svcMapProcessCodeMemory]] || W0=process_handle, X1=dstaddr, X2=srcaddr, X3=size |
| + | R0=process_handle, R1=srcaddr_lower32, R2=dstaddr_lower32, R3=dstaddr_upper32, R4=srcaddr_lower32, R5=size_lower32, R6=size_upper32 |
| + | || W0=result |
| |- | | |- |
− | | 0x78 || [[#svcUnmapProcessCodeMemory]] || W0=process_handle, X1=dstaddr, X2=srcaddr, X3=size || W0=result | + | | 0x78 || [[#svcUnmapProcessCodeMemory]] || W0=process_handle, X1=dstaddr, X2=srcaddr, X3=size |
| + | R0=process_handle, R1=srcaddr_lower32, R2=dstaddr_lower32, R3=dstaddr_upper32, R4=srcaddr_lower32, R5=size_lower32, R6=size_upper32 |
| + | || W0=result |
| |- | | |- |
| | 0x79 || [[#svcCreateProcess]] || X1=procinfo_ptr, X2=caps_ptr, W3=cap_num || W0=result, W1=process_handle | | | 0x79 || [[#svcCreateProcess]] || X1=procinfo_ptr, X2=caps_ptr, W3=cap_num || W0=result, W1=process_handle |
| |- | | |- |
− | | 0x7A || svcStartProcess || W0=process_handle, W1=main_thread_prio, W2=default_cpuid, W3=main_thread_stacksz || W0=result | + | | 0x7A || svcStartProcess || W0=process_handle, W1=main_thread_prio, W2=default_cpuid, W3=main_thread_stacksz |
| + | R0=process_handle, R1=main_thread_prio, R2=default_cpuid, R3=main_thread_stacksz_lower32, R4=main_thread_stacksz_upper32 |
| + | || W0=result |
| |- | | |- |
| | 0x7B || svcTerminateProcess || W0=process_handle || W0=result | | | 0x7B || svcTerminateProcess || W0=process_handle || W0=result |
| |- | | |- |
− | | 0x7C || [[#svcGetProcessInfo]] || W0=process_handle, W1=[[#ProcessInfoType]] || W0=result, X1=[[#ProcessState]] | + | | 0x7C || [[#svcGetProcessInfo]] || W0=process_handle, W1=[[#ProcessInfoType]] |
| + | R1=process_handle, R2=[[#ProcessInfoType]] |
| + | || W0=result, X1=[[#ProcessState]] |
| + | R0=result, R1=[[#ProcessState]]_lower32, R2=[[#ProcessState]]_upper32 |
| |- | | |- |
| | 0x7D || svcCreateResourceLimit || None || W0=result, W1=reslimit_handle | | | 0x7D || svcCreateResourceLimit || None || W0=result, W1=reslimit_handle |
| |- | | |- |
− | | 0x7E || svcSetResourceLimitLimitValue || W0=reslimit_handle, W1=[[#LimitableResource]], X2=value || W0=result | + | | 0x7E || svcSetResourceLimitLimitValue || W0=reslimit_handle, W1=[[#LimitableResource]], X2=value |
| + | R0=reslimit_handle, R1=[[#LimitableResource]], R2=value_lower32, R3=value_upper32 |
| + | || W0=result |
| |- | | |- |
− | | 0x7F || [[#svcCallSecureMonitor]] || X0=smc_sub_id, X1,X2,X3,X4,X5,X6,X7=smc_args || X0,X1,X2,X3,X4,X5,X6,X7=result | + | | 0x7F || [[#svcCallSecureMonitor]] || X0=smc_sub_id, X1,X2,X3,X4,X5,X6,X7=smc_args |
| + | R0=smc_sub_id, R1, R2, R3=smc_args |
| + | || X0,X1,X2,X3,X4,X5,X6,X7=result |
| + | R0,R1,R2,R3=result |
| |} | | |} |
| | | |
Line 295: |
Line 348: |
| Size must be a multiple of 0x200000 (2MB). | | Size must be a multiple of 0x200000 (2MB). |
| | | |
− | On success, the heap base-address (which is fixed by kernel, aslr'd) is written to OutAddr. | + | On success, the heap base-address (which is fixed by kernel, aslr'd, and always in the Heap memory region) is written to OutAddr. |
| | | |
− | Uses current process pool partition. | + | Uses current process pool partition. The memory allocated counts towards the caller's process Memory ResourceLimit. |
| | | |
| [2.0.0+] Size must be less than or equal to 4GB. | | [2.0.0+] Size must be less than or equal to 4GB. |
| + | |
| + | === Result codes === |
| + | |
| + | '''0x0:''' Success. |
| + | |
| + | '''0xCA01:''' Invalid size passed. It's either bigger than 4GB, or misaligned. |
| + | |
| + | '''0xD001:''' Size is bigger than the Heap Region size. |
| + | |
| + | '''0xCE01:''' KMemoryBlockAllocator slab allocator exhausted. |
| + | |
| + | '''0xD401:''' The memory region is in an invalid state. Likely because a mapping was made in the heap region. |
| + | |
| + | '''0x10801:''' Memory resource limit reached. |
| | | |
| == svcSetMemoryPermission == | | == svcSetMemoryPermission == |
Line 1,263: |
Line 1,330: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) W0 || Handle<DeviceAddressSpace> || DeviceAsHandle | + | | (In) W0 || R0 || Handle<DeviceAddressSpace> || DeviceAsHandle |
| |- | | |- |
− | | (In) W1 || Handle<Process> || ProcessHandle | + | | (In) W1 || R1 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X2 || void* || SrcAddr | + | | (In) X2 || R2, R3 || void* || SrcAddr |
| |- | | |- |
− | | (In) X3 || u64 || DeviceAsSize | + | | (In) X3 || R4 || u64 || DeviceAsSize |
| |- | | |- |
− | | (In) X4 || u64 || DeviceAsAddr | + | | (In) X4 || R5, R6 || u64 || DeviceAsAddr |
| |- | | |- |
− | | (In) W5 || [[#Permission]] || Permissions | + | | (In) W5 || R7 || [[#Permission]] || Permissions |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,292: |
Line 1,359: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) W0 || Handle<DeviceAddressSpace> || DeviceAsHandle | + | | (In) W0 || R0 || Handle<DeviceAddressSpace> || DeviceAsHandle |
| |- | | |- |
− | | (In) W1 || Handle<Process> || ProcessHandle | + | | (In) W1 || R1 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X2 || void* || SrcAddr | + | | (In) X2 || R2, R3 || void* || SrcAddr |
| |- | | |- |
− | | (In) X3 || u64 || DeviceAsSize | + | | (In) X3 || R4 || u64 || DeviceAsSize |
| |- | | |- |
− | | (In) X4 || u64 || DeviceAsAddr | + | | (In) X4 || R5, R6 || u64 || DeviceAsAddr |
| |- | | |- |
− | | (In) W5 || [[#Permission]] || Permissions | + | | (In) W5 || R7 || [[#Permission]] || Permissions |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,319: |
Line 1,386: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) W0 || Handle<DeviceAddressSpace> || DeviceAsHandle | + | | (In) W0 || R0 || Handle<DeviceAddressSpace> || DeviceAsHandle |
| |- | | |- |
− | | (In) W1 || Handle<Process> || ProcessHandle | + | | (In) W1 || R1 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X2 || void* || SrcAddr | + | | (In) X2 || R2, R3 || void* || SrcAddr |
| |- | | |- |
− | | (In) X3 || u64 || DeviceAsSize | + | | (In) X3 || R4 || u64 || DeviceAsSize |
| |- | | |- |
− | | (In) X4 || u64 || DeviceAsAddr | + | | (In) X4 || R5, R6 || u64 || DeviceAsAddr |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,396: |
Line 1,463: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) W0 || Handle<Process> || ProcessHandle | + | | (In) W0 || R0 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X1 || u64 || Addr | + | | (In) X1 || R2, R3 || u64 || Addr |
| |- | | |- |
− | | (In) X2 || u64 || Size | + | | (In) X2 || R1, R4 || u64 || Size |
| |- | | |- |
− | | (In) W3 || void* || Perm | + | | (In) W3 || R5 || void* || Perm |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,419: |
Line 1,486: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) X0 || u64 || DstAddr | + | | (In) X0 || R0 || u64 || DstAddr |
| |- | | |- |
− | | (In) W1 || Handle<Process> || ProcessHandle | + | | (In) W1 || R1 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X2 || void* || SrcAddr | + | | (In) X2 || R2, R3 || void* || SrcAddr |
| |- | | |- |
− | | (In) X3 || u64 || Size | + | | (In) X3 || R4 || u64 || Size |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,442: |
Line 1,509: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) X0 || void* || DstAddr | + | | (In) X0 || R0 || void* || DstAddr |
| |- | | |- |
− | | (In) W1 || Handle<Process> || ProcessHandle | + | | (In) W1 || R1 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X2 || u64 || SrcAddr | + | | (In) X2 || R2, R3 || u64 || SrcAddr |
| |- | | |- |
− | | (In) X3 || u64 || Size | + | | (In) X3 || R4 || u64 || Size |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,463: |
Line 1,530: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) X0 || [[#MemoryInfo]]* || MemInfoPtr | + | | (In) X0 || R0 || [[#MemoryInfo]]* || MemInfoPtr |
| |- | | |- |
− | | (In) W2 || Handle<Process> || ProcessHandle | + | | (In) W2 || R2 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X3 || u64 || Addr | + | | (In) X3 || R1, R3 || u64 || Addr |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |- | | |- |
− | | (Out) W1 || PageInfo || PageInfo | + | | (Out) W1 || R1 || PageInfo || PageInfo |
| |} | | |} |
| </div> | | </div> |
Line 1,484: |
Line 1,551: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) W0 || Handle<Process> || ProcessHandle | + | | (In) W0 || R0 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X1 || u64 || DstAddr | + | | (In) X1 || R2, R3 || u64 || DstAddr |
| |- | | |- |
− | | (In) X2 || u64 || SrcAddr | + | | (In) X2 || R1, R4 || u64 || SrcAddr |
| |- | | |- |
− | | (In) X3 || u64 || Size | + | | (In) X3 || R5, R6 || u64 || Size |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,505: |
Line 1,572: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) W0 || Handle<Process> || ProcessHandle | + | | (In) W0 || R0 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) X1 || u64 || DstAddr | + | | (In) X1 || R2, R3 || u64 || DstAddr |
| |- | | |- |
− | | (In) X2 || u64 || SrcAddr | + | | (In) X2 || R1, R4 || u64 || SrcAddr |
| |- | | |- |
− | | (In) X3 || u64 || Size | + | | (In) X3 || R5, R6 || u64 || Size |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |
Line 1,565: |
Line 1,632: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| + | |- |
| + | | (In) W0 || R1 || Handle<Process> || ProcessHandle |
| |- | | |- |
− | | (In) W0 || Handle<Process> || ProcessHandle | + | | (In) W1 || R2 || [[#ProcessInfoType]] || InfoType |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |- | | |- |
− | | (Out) W1 || [[#ProcessState]] || State | + | | (Out) X1 || R1, R2 || [[#ProcessState]] || State |
| |} | | |} |
| </div> | | </div> |
Line 1,582: |
Line 1,651: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) X0 || u64 || [[SMC#ID_0|Function ID]] | + | | (In) X0 || R0 || u64 || [[SMC#ID_0|Function ID]] |
| |- | | |- |
− | | (In) X1-X7 || u64 || SMC sub-arguments | + | | (In) X1-X7 || R1-R3 || u64 || SMC sub-arguments |
| |- | | |- |
− | | (Out) X0 || [[SMC#Errors|SMC Result]] || Result of SMC | + | | (Out) X0 || R0 || [[SMC#Errors|SMC Result]] || Result of SMC |
| |- | | |- |
− | | (Out) X1-X7 || u64 || SMC sub-output | + | | (Out) X1-X7 || R1-R3 || u64 || SMC sub-output |
| |} | | |} |
| </div> | | </div> |
Line 1,618: |
Line 1,687: |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| |- | | |- |
− | ! Argument || Type || Name | + | ! Argument64 || Argument32 || Type || Name |
| |- | | |- |
− | | (In) W0 || u32 || hardware_breakpoint_id | + | | (In) W0 || R0 || u32 || hardware_breakpoint_id |
| |- | | |- |
− | | (In) W1 || u64 || flags | + | | (In) X1 || R2, R3 || u64 || flags |
| |- | | |- |
− | | (In) W2 || u64 || value | + | | (In) X2 || R1, R4 || u64 || value |
| |- | | |- |
− | | (Out) W0 || [[#Result]] || Ret | + | | (Out) W0 || R0 || [[#Result]] || Ret |
| |} | | |} |
| </div> | | </div> |