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7,736 bytes added ,  17:58, 16 September 2019
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Line 18: Line 18:  
| 5 || GetBoardPowerControlEvent
 
| 5 || GetBoardPowerControlEvent
 
|-
 
|-
| 6 || GetSleepButtonState
+
| 6 || [2.0.0+] GetSleepButtonState
 
|-
 
|-
| 7 || GetPowerEvent
+
| 7 || [2.0.0+] GetPowerEvent
 
|-
 
|-
| 8 ||
+
| 8 || [2.0.0+] CreateWakeupTimer
 
|-
 
|-
| 9 ||
+
| 9 || [2.0.0+] CancelWakeupTimer
 
|-
 
|-
| 10 ||
+
| 10 || [2.0.0+] [[#EnableWakeupTimerOnDevice]]
 +
|-
 +
| 11 || [3.0.0+] CreateWakeupTimerEx
 +
|-
 +
| 12 || [3.0.0+] GetLastEnabledWakeupTimerType
 +
|-
 +
| 13 || [3.0.0+] CleanAllWakeupTimers
 +
|-
 +
| 14 || [6.0.0+]
 
|}
 
|}
 +
 +
== EnableWakeupTimerOnDevice ==
 +
No input, returns a total of 0x10-bytes of output. [3.0.0+] Now returns a total of 0xC-bytes of output.
    
= bpc:r =
 
= bpc:r =
 
This is "nn::bpc::IRtcManager".
 
This is "nn::bpc::IRtcManager".
 +
 +
This service no longer exists in [9.0.0+].
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
Line 36: Line 49:  
! Cmd || Name
 
! Cmd || Name
 
|-
 
|-
| 0 || GetExternalRtcValue
+
| 0 || GetRtcTime
 
|-
 
|-
| 1 || SetExternalRtcValue
+
| 1 || SetRtcTime
 
|-
 
|-
| 2 || ReadExternalRtcResetFlag
+
| 2 || GetRtcResetDetected
 
|-
 
|-
| 3 || ClearExternalRtcResetFlag
+
| 3 || [2.0.0+] ClearRtcResetDetected
 +
|-
 +
| 4 || [3.0.0+] SetUpRtcResetOnShutdown
 
|}
 
|}
   −
GetExternalRtcValue / SetExternalRtcValue directly accesses the max77620_rtc0 device.
+
GetRtcTime / SetRtcTime directly accesses the max77620_rtc0 device.
    
= pcv =
 
= pcv =
Line 54: Line 69:  
! Cmd || Name
 
! Cmd || Name
 
|-
 
|-
| 0 || SetPowerEnabled
+
| [1.0.0-7.0.1] 0 || SetPowerEnabled
 
|-
 
|-
| 1 || SetClockEnabled
+
| [1.0.0-7.0.1] 1 || SetClockEnabled
 
|-
 
|-
| 2 || SetClockRate
+
| [1.0.0-7.0.1] 2 || SetClockRate
 
|-
 
|-
| 3 || GetClockRate
+
| [1.0.0-7.0.1] 3 || GetClockRate
 
|-
 
|-
| 4 || GetState
+
| [1.0.0-7.0.1] 4 || GetState
 
|-
 
|-
| 5 || GetPossibleClockRates
+
| [1.0.0-7.0.1] 5 || GetPossibleClockRates
 
|-
 
|-
| 6 || SetMinVClockRate
+
| [1.0.0-7.0.1] 6 || SetMinVClockRate
 
|-
 
|-
| 7 || SetReset
+
| [1.0.0-7.0.1] 7 || SetReset
 
|-
 
|-
| 8 || SetVoltageEnabled
+
| [1.0.0-7.0.1] 8 || SetVoltageEnabled
 
|-
 
|-
| 9 || GetVoltageEnabled
+
| [1.0.0-7.0.1] 9 || GetVoltageEnabled
 
|-
 
|-
| 10 || GetVoltageRange
+
| [1.0.0-7.0.1] 10 || GetVoltageRange
 
|-
 
|-
| 11 || SetVoltageValue
+
| [1.0.0-7.0.1] 11 || SetVoltageValue
 
|-
 
|-
| 12 || GetVoltageValue
+
| [1.0.0-7.0.1] 12 || GetVoltageValue
 
|-
 
|-
| 13 || GetTemperatureThresholds
+
| [1.0.0-7.0.1] 13 || GetTemperatureThresholds
 
|-
 
|-
| 14 || SetTemperature
+
| [1.0.0-7.0.1] 14 || SetTemperature
 
|-
 
|-
| 15 || Initialize
+
| [1.0.0-5.1.0] 15 || Initialize
 
|-
 
|-
| 16 || IsInitialized
+
| [1.0.0-5.1.0] 16 || IsInitialized
 
|-
 
|-
| 17 || Finalize
+
| [1.0.0-5.1.0] 17 || Finalize
 
|-
 
|-
| 18 || PowerOn
+
| [3.0.0-7.0.1] 18 || PowerOn
 
|-
 
|-
| 19 || PowerOff
+
| [3.0.0-7.0.1] 19 || PowerOff
 
|-
 
|-
| 20 || ChangeVoltage
+
| [3.0.0-7.0.1] 20 || ChangeVoltage
 
|-
 
|-
| 21 || GetPowerClockInfoEvent
+
| [3.0.0-7.0.1] 21 || GetPowerClockInfoEvent
 
|-
 
|-
| 22 || GetOscillatorClock
+
| [3.0.0-7.0.1] 22 || GetOscillatorClock
 
|-
 
|-
| 23 || GetDvfsTable
+
| [3.0.0-7.0.1] 23 || GetDvfsTable
 
|-
 
|-
| 24 || GetModuleStateTable
+
| [3.0.0-7.0.1] 24 || GetModuleStateTable
 
|-
 
|-
| 25 || GetPowerDomainStateTable
+
| [3.0.0-7.0.1] 25 || GetPowerDomainStateTable
 
|-
 
|-
| 26 || GetFuseInfo
+
| 26 || [3.0.0+] GetFuseInfo
 
|-
 
|-
 +
| 27 || [5.0.0+] GetDramId
 +
|-
 +
| [6.0.0-7.0.1] 28 || [[#IsPoweredOn]]
 +
|-
 +
| [6.0.0-7.0.1] 29 || [[#GetVoltage]]
 
|}
 
|}
   −
== User Name to Block Maps ==
+
[7.0.0+] The type-0xA output buffers were replaced with type-0x22 output buffers, for the following: GetDvfsTable, GetModuleStateTable, and GetPowerDomainStateTable.
 +
 
 +
== IsPoweredOn ==
 +
Takes an u32 '''PowerControlTarget''' and returns a bool indicating the status of the requested [[#Voltage|voltage block]].
 +
 
 +
== GetVoltage ==
 +
Takes an u32 '''PowerControlTarget''' and returns an u32 voltage value for the requested [[#Voltage|voltage block]].
 +
 
 +
== Modules ==
 +
These are "nn::pcv::Module_X" where X is the power, clock and reset block name.
 +
 
 +
[8.0.0+] Every module name is now mapped to an ID.
    
=== Power Switch / Clocking / Reset ===
 
=== Power Switch / Clocking / Reset ===
   
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
 
|-
 
|-
! Name || Block || Rail || Notes
+
! Name || ID || Block || Rail || Notes
 
|-
 
|-
|  0 || CpuBus || vdd_cpu ||
+
|  0 || 0x40000001 || CpuBus || vdd_cpu ||
 
|-
 
|-
|  1 || GPU || vdd_gpu ||
+
|  1 || 0x40000002 || GPU || vdd_gpu ||
 
|-
 
|-
|  2 || I2S1 || vdd_soc ||
+
|  2 || 0x40000003 || I2S1 || vdd_soc ||
 
|-
 
|-
|  3 || I2S2 || vdd_soc ||
+
|  3 || 0x40000004 || I2S2 || vdd_soc ||
 
|-
 
|-
|  4 || I2S3 || vdd_soc ||
+
|  4 || 0x40000005 || I2S3 || vdd_soc ||
 
|-
 
|-
|  5 || PWM || vdd_soc ||
+
|  5 || 0x40000006 || PWM || vdd_soc ||
 
|-
 
|-
|  6 || I2C1 || vdd_soc ||
+
|  6 || 0x02000001 || I2C1 || vdd_soc ||
 
|-
 
|-
|  7 || I2C2 || vdd_soc ||
+
|  7 || 0x02000002 || I2C2 || vdd_soc ||
 
|-
 
|-
|  8 || I2C3 || vdd_soc ||
+
|  8 || 0x02000003 || I2C3 || vdd_soc ||
 
|-
 
|-
|  9 || I2C4 || vdd_soc ||
+
|  9 || 0x02000004 || I2C4 || vdd_soc ||
 
|-
 
|-
| 10 || I2C5 || vdd_soc ||
+
| 10 || 0x02000005 || I2C5 || vdd_soc ||
 
|-
 
|-
| 11 || I2C6 || vdd_soc ||
+
| 11 || 0x02000006 || I2C6 || vdd_soc ||
 
|-
 
|-
| 12 || SPI1 || vdd_soc ||
+
| 12 || 0x07000000 || SPI1 || vdd_soc ||
 
|-
 
|-
| 13 || SPI2 || vdd_soc ||
+
| 13 || 0x07000001 || SPI2 || vdd_soc ||
 
|-
 
|-
| 14 || SPI3 || vdd_soc ||
+
| 14 || 0x07000002 || SPI3 || vdd_soc ||
 
|-
 
|-
| 15 || SPI4 || vdd_soc ||
+
| 15 || 0x07000003 || SPI4 || vdd_soc ||
 
|-
 
|-
| 16 || DISP1 || vdd_soc ||
+
| 16 || 0x40000011 || DISP1 || vdd_soc ||
 
|-
 
|-
| 17 || DISP2 || vdd_soc ||
+
| 17 || 0x40000012 || DISP2 || vdd_soc ||
 
|-
 
|-
| 20 || SDMMC1 || vdd_soc ||
+
| 18 || 0x40000013 || ISP || - || Not an actual block. Used for debug.
 
|-
 
|-
| 21 || SDMMC2 || vdd_soc ||
+
| 19 || 0x40000014 || VI || - || Not an actual block. Used for debug.
 
|-
 
|-
| 22 || SDMMC3 || vdd_soc ||
+
| 20 || 0x40000015 || SDMMC1 || vdd_soc ||
 
|-
 
|-
| 23 || SDMMC4 || vdd_soc ||
+
| 21 || 0x40000016 || SDMMC2 || vdd_soc ||
 
|-
 
|-
| 24 || - || - || Not actual block. Used for debug and stuff.
+
| 22 || 0x40000017 || SDMMC3 || vdd_soc ||
 
|-
 
|-
| 25 || CSITE || vdd_soc ||
+
| 23 || 0x40000018 || SDMMC4 || vdd_soc ||
 
|-
 
|-
| 26 || TSEC || vdd_soc ||
+
| 24 || 0x40000019 || OWR || - || Not an actual block. Used for debug.
 
|-
 
|-
| 27 || MSELECT || vdd_soc ||
+
| 25 || 0x4000001A || CSITE || vdd_soc ||
 
|-
 
|-
| 28 || HDA2CODEC_2X || vdd_soc ||
+
| 26 || 0x4000001B || TSEC || vdd_soc ||
 
|-
 
|-
| 29 || ACTMON || vdd_soc ||
+
| 27 || 0x4000001C || MSELECT || vdd_soc ||
 
|-
 
|-
| 30 || I2C_SLOW || vdd_soc ||
+
| 28 || 0x4000001D || HDA2CODEC_2X || vdd_soc ||
 
|-
 
|-
| 31 || SOR1 || vdd_soc ||
+
| 29 || 0x4000001E || ACTMON || vdd_soc ||
 
|-
 
|-
| 33 || HDA || vdd_soc ||
+
| 30 || 0x4000001F || I2C_SLOW || vdd_soc ||
 
|-
 
|-
| 34 || XUSB_CORE_HOST || vdd_soc ||
+
| 31 || 0x40000020 || SOR1 || vdd_soc ||
 
|-
 
|-
| 35 || XUSB_FALCON || vdd_soc ||
+
| 32 || 0x40000021 || SATA || - || Not an actual block. Used for debug.
 
|-
 
|-
| 36 || XUSB_FS || vdd_soc ||
+
| 33 || 0x40000022 || HDA || vdd_soc ||
 
|-
 
|-
| 37 || XUSB_CORE_DEV || vdd_soc ||
+
| 34 || 0x40000023 || XUSB_CORE_HOST || vdd_soc ||
 
|-
 
|-
| 38 || XUSB_SS_HOSTDEV || vdd_soc ||
+
| 35 || 0x40000024 || XUSB_FALCON || vdd_soc ||
 
|-
 
|-
| 39 || UARTA || vdd_soc ||
+
| 36 || 0x40000025 || XUSB_FS || vdd_soc ||
 
|-
 
|-
| 40 || UARTB || vdd_soc ||
+
| 37 || 0x40000026 || XUSB_CORE_DEV || vdd_soc ||
 
|-
 
|-
| 41 || UARTC || vdd_soc ||
+
| 38 || 0x40000027 || XUSB_SS_HOSTDEV || vdd_soc ||
 
|-
 
|-
| 42 || UARTD || vdd_soc ||
+
| 39 || 0x03000001 || UARTA || vdd_soc ||
 
|-
 
|-
| 43 || HOST1X || vdd_soc ||
+
| 40 || 0x35000405 || UARTB || vdd_soc ||
 
|-
 
|-
| 44 || ENTROPY || vdd_soc ||
+
| 41 || 0x3500040F || UARTC || vdd_soc ||
 
|-
 
|-
| 45 || SOC_THERM || vdd_soc ||
+
| 42 || 0x37000001 || UARTD || vdd_soc ||
 
|-
 
|-
| 46 || VIC || vdd_soc ||
+
| 43 || 0x4000002C || HOST1X || vdd_soc ||
 
|-
 
|-
| 47 || NVENC || vdd_soc ||
+
| 44 || 0x4000002D || ENTROPY || vdd_soc ||
 
|-
 
|-
| 48 || NVJPG || vdd_soc ||
+
| 45 || 0x4000002E || SOC_THERM || vdd_soc ||
 
|-
 
|-
| 49 || NVDEC || vdd_soc ||
+
| 46 || 0x4000002F || VIC || vdd_soc ||
 
|-
 
|-
| 50 || QSPI || vdd_soc ||
+
| 47 || 0x40000030 || NVENC || vdd_soc ||
 
|-
 
|-
| 52 || TSECB || vdd_soc ||
+
| 48 || 0x40000031 || NVJPG || vdd_soc ||
 
|-
 
|-
| 53 || APE || vdd_soc ||
+
| 49 || 0x40000032 || NVDEC || vdd_soc ||
 
|-
 
|-
| 54 || ACLK || vdd_soc ||
+
| 50 || 0x40000033 || QSPI || vdd_soc ||
 
|-
 
|-
| 55 || UARTAPE || vdd_soc ||
+
| 51 || 0x40000034 || VI_I2C || - || Not an actual block. Used for debug.
 
|-
 
|-
| 56 || EMC || vdd_soc ||
+
| 52 || 0x40000035 || TSECB || vdd_soc ||
 
|-
 
|-
| 57 || PLLE0 || vdd_soc ||
+
| 53 || 0x40000036 || APE || vdd_soc ||
 
|-
 
|-
| 58 || PLLE0 || vdd_soc ||
+
| 54 || 0x40000037 || ACLK || vdd_soc ||
 
|-
 
|-
| 59 || DSI || vdd_soc ||
+
| 55 || 0x40000038 || UARTAPE || vdd_soc ||
 
|-
 
|-
| 60 || MAUD || vdd_soc ||
+
| 56 || 0x40000039 || EMC || vdd_soc ||
 
|-
 
|-
| 61 || DPAUX1 || vdd_soc ||
+
| 57 || 0x4000003A || PLLE0 || vdd_soc ||
 
|-
 
|-
| 62 || MIPI_CAL || vdd_soc ||
+
| 58 || 0x4000003B || PLLE0 || vdd_soc ||
 
|-
 
|-
| 63 || UART_FST_MIPI_CAL || vdd_soc ||
+
| 59 || 0x4000003C || DSI || vdd_soc ||
 
|-
 
|-
| 64 || OSC || vdd_soc ||
+
| 60 || 0x4000003D || MAUD || vdd_soc ||
 
|-
 
|-
| 65 || SCLK || vdd_soc ||
+
| 61 || 0x4000003E || DPAUX1 || vdd_soc ||
 
|-
 
|-
| 66 || SOR_SAFE || vdd_soc ||
+
| 62 || 0x4000003F || MIPI_CAL || vdd_soc ||
 
|-
 
|-
| 67 || XUSB_SS || vdd_soc ||
+
| 63 || 0x40000040 || UART_FST_MIPI_CAL || vdd_soc ||
 
|-
 
|-
| 68 || XUSB_HOST || vdd_soc ||
+
| 64 || 0x40000041 || OSC || vdd_soc ||
 
|-
 
|-
| 69 || XUSB_DEV || vdd_soc ||
+
| 65 || 0x40000042 || SCLK || vdd_soc ||
 
|-
 
|-
| 70 || EXTPERIPH1 || vdd_soc ||
+
| 66 || 0x40000043 || SOR_SAFE || vdd_soc ||
 
|-
 
|-
| 71 || AHUB || vdd_soc ||
+
| 67 || 0x40000044 || XUSB_SS || vdd_soc ||
 
|-
 
|-
| 72 || HDA2HDMICODEC || vdd_soc ||
+
| 68 || 0x40000045 || XUSB_HOST || vdd_soc ||
 
|-
 
|-
| 73 || PLLP5 || vdd_soc ||
+
| 69 || 0x40000046 || XUSB_DEV || vdd_soc ||
 
|-
 
|-
| 74 || USBD || vdd_soc ||
+
| 70 || 0x40000047 || EXTPERIPH1 || vdd_soc ||
 
|-
 
|-
| 75 || USB2 || vdd_soc ||
+
| 71 || 0x40000048 || AHUB || vdd_soc ||
 
|-
 
|-
| 76 || PCIE || vdd_soc ||
+
| 72 || 0x40000049 || HDA2HDMICODEC || vdd_soc ||
 
|-
 
|-
| 77 || AFI || vdd_soc ||
+
| 73 || 0x4000004A || PLLP5 || vdd_soc ||
 
|-
 
|-
| 78 || PCIEXCLK || vdd_soc ||
+
| 74 || 0x4000004B || USBD || vdd_soc ||
 
|-
 
|-
| 79 || PEX_USB_UPHY || vdd_soc ||
+
| 75 || 0x4000004C || USB2 || vdd_soc ||
 
|-
 
|-
| 80 || XUSB_PADCTL || vdd_soc ||
+
| 76 || 0x4000004D || PCIE || vdd_soc ||
 
|-
 
|-
| 81 || APBDMA || vdd_soc ||
+
| 77 || 0x4000004E || AFI || vdd_soc ||
 
|-
 
|-
| 82 || USB2_TRK || vdd_soc ||
+
| 78 || 0x4000004F || PCIEXCLK || vdd_soc ||
 
|-
 
|-
| 83 || PLLE0 || vdd_soc ||
+
| 79 || 0x40000050 || PEX_USB_UPHY || vdd_soc ||
 
|-
 
|-
| 84 || PLLE0 || vdd_soc ||
+
| 80 || 0x40000051 || XUSB_PADCTL || vdd_soc ||
 
|-
 
|-
| 85 || CEC || vdd_soc ||
+
| 81 || 0x40000052 || APBDMA || vdd_soc ||
 
|-
 
|-
 +
| 82 || 0x40000053 || USB2_TRK || vdd_soc ||
 +
|-
 +
| 83 || 0x40000054 || PLLE0 || vdd_soc ||
 +
|-
 +
| 84 || 0x40000055 || PLLE0 || vdd_soc ||
 +
|-
 +
| 85 || 0x40000056 || CEC || vdd_soc ||
 +
|-
 +
| [6.0.0+] 86 || 0x40000057 || EXTPERIPH2 || vdd_soc ||
 
|}
 
|}
    
=== Voltage ===
 
=== Voltage ===
   
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
 
|-
 
|-
Line 320: Line 358:  
| 14 || max77621_gpu ||  
 
| 14 || max77621_gpu ||  
 
|-
 
|-
 +
| [6.0.0+] 15 || max77812_cpu ||
 +
|-
 +
| [6.0.0+] 16 || max77812_gpu ||
 +
|-
 +
| [6.0.0+] 17 || max77812_dram ||
 
|}
 
|}
   Line 326: Line 369:  
= pcv:arb =
 
= pcv:arb =
 
This is "nn::pcv::IArbitrationManager".
 
This is "nn::pcv::IArbitrationManager".
 +
 +
This service no longer exists in [8.0.0+].
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
Line 332: Line 377:  
|-
 
|-
 
| 0 || ReleaseControl
 
| 0 || ReleaseControl
|-
   
|}
 
|}
    
= pcv:imm =
 
= pcv:imm =
 
This is "nn::pcv::IImmediateManager".
 
This is "nn::pcv::IImmediateManager".
 +
 +
This service no longer exists in [8.0.0+].
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
Line 343: Line 389:  
|-
 
|-
 
| 0 || SetClockRate
 
| 0 || SetClockRate
 +
|}
 +
 +
= clkrst, clkrst:i =
 +
These are "nn::clkrst::IClkrstManager" and "nn::clkrst::IImmediateManager".
 +
 +
These were added with [8.0.0+].
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Cmd || Name
 +
|-
 +
| 0 || [[#OpenSession]]
 +
|-
 +
| 1 || GetTemperatureThresholds
 +
|-
 +
| 2 || SetTemperature
 +
|-
 +
| 3 || GetPossibleClockRates
 +
|-
 +
| 4 || GetClockInfoEvent
 +
|-
 +
| 5 || GetClockModuleNumLimit
 +
|}
 +
 +
== OpenSession ==
 +
Takes an u32 '''ModuleID''', an u32 '''ModuleUnk''' and returns an [[#IClkrstSession]].
 +
 +
== GetClockModuleNumLimit ==
 +
Returns 0x1A.
 +
 +
== IClkrstSession ==
 +
This is "nn::clkrst::IClkrstSession".
 +
 +
{| class="wikitable" border="1"
 
|-
 
|-
 +
! Cmd || Name
 +
|-
 +
| 0 || SetClockEnabled
 +
|-
 +
| 1 || SetClockDisabled
 +
|-
 +
| 2 || SetResetAsserted
 +
|-
 +
| 3 || SetResetDeasserted
 +
|-
 +
| 4 || SetPowerEnabled
 +
|-
 +
| 5 || SetPowerDisabled
 +
|-
 +
| 6 || GetState
 +
|-
 +
| 7 || SetClockRate
 +
|-
 +
| 8 || GetClockRate
 +
|-
 +
| 9 || SetMinVClockRate
 +
|-
 +
| 10 || GetPossibleClockRates
 +
|-
 +
| 11 || GetDvfsTable
 
|}
 
|}
 +
 +
= clkrst:a =
 +
This is "nn::clkrst::IArbitrationManager".
 +
 +
This was added with [8.0.0+].
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Cmd || Name
 +
|-
 +
| 0 || [[#ReleaseControl]]
 +
|}
 +
 +
== ReleaseControl ==
 +
Takes an u32 '''ModuleID'''. No output.
 +
 +
= rgltr =
 +
This is "nn::regulator::IRegulatorManager".
 +
 +
This was added with [8.0.0+].
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Cmd || Name
 +
|-
 +
| 0 || [[#OpenSession]]
 +
|-
 +
| 1 || GetPowerDomainStateTable
 +
|-
 +
| 2 || GetPowerInfoEvent
 +
|-
 +
| 3 || GetPowerModuleNumLimit
 +
|}
 +
 +
== OpenSession ==
 +
Takes an u32 '''ModuleID''' and returns an [[#IRegulatorSession]].
 +
 +
== GetPowerModuleNumLimit ==
 +
Returns 0x3.
 +
 +
== IRegulatorSession ==
 +
This is "nn::regulator::IRegulatorSession".
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Cmd || Name
 +
|-
 +
| 0 || [[#SetVoltageEnabled]]
 +
|-
 +
| 1 ||
 +
|-
 +
| 2 || [[#GetVoltageEnabled]]
 +
|-
 +
| 3 || GetVoltageRange
 +
|-
 +
| 4 || GetVoltageValue
 +
|-
 +
| 5 || [[#SetVoltageValue]]
 +
|-
 +
| 6 || ChangeVoltage
 +
|}
 +
 +
=== SetVoltageEnabled ===
 +
Takes a bool. Enables/disables the LDO this session was opened for.
 +
 +
=== GetVoltageEnabled ===
 +
Returns a bool. True if voltage is enabled, false if not.
 +
 +
=== SetVoltageValue ===
 +
Takes in a voltage in microvolts and sets the LDO to this voltage.
 +
 +
= rtc =
 +
This was added with [8.0.0+].
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Cmd || Name
 +
|-
 +
| 0 || GetRtcTime
 +
|-
 +
| 1 || SetRtcTime
 +
|-
 +
| 2 || SetRtcClientUnknownBool
 +
|-
 +
| 3 || GetRtcResetDetected
 +
|-
 +
| 4 || ClearRtcResetDetected
 +
|}
 +
 +
Commands 0, 1, 3, 4 call the same internal functions as bpc:r, except they take an extra u32 [[Bus_services#Known_Devices_2|device code]], where bpc:r hardcodes 0x3B000001 (max77620_rtc0).
 +
 +
Command 2 takes a u8 bool and a u32 device code; it opens an i2c session to the device code, and sets *(i2c_session_client_object + 0x38) = bool.
    
= time:u, time:a, time:s =
 
= time:u, time:a, time:s =
 
This is "nn::timesrv::detail::service::IStaticService".
 
This is "nn::timesrv::detail::service::IStaticService".
 +
 +
[9.0.0+] These services were moved to [[Glue_services|Glue]] and [[PSC_services|PSC]].
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
Line 364: Line 563:  
|-
 
|-
 
| 5 || [4.0.0+] GetEphemeralNetworkSystemClock || Returns an [[#ISystemClock]].
 
| 5 || [4.0.0+] GetEphemeralNetworkSystemClock || Returns an [[#ISystemClock]].
 +
|-
 +
| 20 || [6.0.0+] GetSharedMemoryNativeHandle ||
 +
|-
 +
| 30 || [6.0.0+] GetStandardNetworkClockOperationEventReadableHandle ||
 +
|-
 +
| 31 || [6.0.0+] GetEphemeralNetworkClockOperationEventReadableHandle ||
 
|-
 
|-
 
| 50 || [4.0.0+] SetStandardSteadyClockInternalOffset ||  
 
| 50 || [4.0.0+] SetStandardSteadyClockInternalOffset ||  
Line 374: Line 579:  
|-
 
|-
 
| 200 || [3.0.0+] IsStandardNetworkSystemClockAccuracySufficient ||  
 
| 200 || [3.0.0+] IsStandardNetworkSystemClockAccuracySufficient ||  
 +
|-
 +
| 201 || [6.0.0+] GetStandardUserSystemClockAutomaticCorrectionUpdatedTime ||
 
|-
 
|-
 
| 300 || [4.0.0+] CalculateMonotonicSystemClockBaseTimePoint ||  
 
| 300 || [4.0.0+] CalculateMonotonicSystemClockBaseTimePoint ||  
Line 415: Line 622:  
! Offset || Size || Description
 
! Offset || Size || Description
 
|-
 
|-
| 0x0 || 0x8|| a u64 representing a point in time.
+
| 0x0 || 0x8|| A u64 representing a point in time.
 
|-
 
|-
| 0x8 || 0x10 || ?
+
| 0x8 || 0x10 || An ID representing the clock source.
 
|}
 
|}
 +
 
This is a 0x18-byte struct.
 
This is a 0x18-byte struct.
   Line 437: Line 645:  
| 2 || GetSystemClockContext || Returns an output [[#SystemClockContext]].
 
| 2 || GetSystemClockContext || Returns an output [[#SystemClockContext]].
 
|-
 
|-
| 3 || SetSystemClockContext || Takes an input [[#SystemClockContext]].
+
| 3 || SetSystemClockContext || Takes an input [[#SystemClockContext]].
 
|-
 
|-
 +
| 4 || [9.0.0+] GetOperationEventReadableHandle ||
 
|}
 
|}
    
=== PosixTime ===
 
=== PosixTime ===
This is an u64 for UTC POSIX time.
+
This is an s64 for UTC POSIX time.
    
=== SystemClockContext ===
 
=== SystemClockContext ===
Line 474: Line 683:  
|-
 
|-
 
| 5 || [2.0.0+] GetTimeZoneRuleVersion ||  No input, returns an output [[#TimeZoneRuleVersion]].
 
| 5 || [2.0.0+] GetTimeZoneRuleVersion ||  No input, returns an output [[#TimeZoneRuleVersion]].
 +
|-
 +
| 6 || [5.0.0+] GetDeviceLocationNameAndUpdatedTime ||
 
|-
 
|-
 
| 100 || ToCalendarTime || Takes an input [[#PosixTime]] and a type-0x15 input buffer for [[#TimeZoneRule]], returns an output [[#CalendarTime]] and [[#CalendarAdditionalInfo]].
 
| 100 || ToCalendarTime || Takes an input [[#PosixTime]] and a type-0x15 input buffer for [[#TimeZoneRule]], returns an output [[#CalendarTime]] and [[#CalendarAdditionalInfo]].
Line 482: Line 693:  
|-
 
|-
 
| 202 || ToPosixTimeWithMyRule || Takes an input [[#CalendarTime]], an type-0xA output buffer for [[#PosixTime]] array, and returns an output s32.
 
| 202 || ToPosixTimeWithMyRule || Takes an input [[#CalendarTime]], an type-0xA output buffer for [[#PosixTime]] array, and returns an output s32.
|-
   
|}
 
|}
   Line 495: Line 705:     
This is loaded from the [[Title_list|TimeZoneBinary]] title with the specified LocationName under the zoneinfo/ directory, the content is then converted into this TimeZoneRule structure.
 
This is loaded from the [[Title_list|TimeZoneBinary]] title with the specified LocationName under the zoneinfo/ directory, the content is then converted into this TimeZoneRule structure.
 +
 +
The files contained under zoneinfo/ directory are Tzif2 files without Tzif1 header and data at the begining of them (see [https://tools.ietf.org/html/rfc8536 RFC8536] for more information).
 +
 +
The conversion of a Tzif2 file to a TimeZoneRule structure is based on [https://github.com/eggert/tz/blob/master/localtime.c tz database code] with some custom modifications (Leap seconds aren't handled, no usage of "posixrules" and Tzif1 support stripped out).
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Offset || Size || Description
 +
|-
 +
| 0x0 || 0x4 || timecnt
 +
|-
 +
| 0x4 || 0x4 || typecnt
 +
|-
 +
| 0x8 || 0x4 || charcnt
 +
|-
 +
| 0xC || 0x1 || goback
 +
|-
 +
| 0xD || 0x1 || goahead
 +
|-
 +
| 0xE || 0x2 || Padding
 +
|-
 +
| 0x10 || 0x8 * 1000 || ats
 +
|-
 +
| 0x1f50 || 0x1 * 1000 || types
 +
|-
 +
| 0x2338 || 0x10 * 128 || ttis (time type information), struct ttinfo[1000]
 +
|-
 +
| 0x2b38 || 0x1 * 512 || chars
 +
|-
 +
| 0x2d38 || 0x4 || defaulttype
 +
|-
 +
| 0x2d3c || 0x12c4 || Reserved / Unused
 +
|}
 +
 +
=== ttinfo ===
 +
This is an 0x10-byte struct.
 +
Represent a Time Type Information used in [[#TimeZoneRule]].
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Offset || Size || Description
 +
|-
 +
| 0x0 || 0x4 || tt_gmtoff
 +
|-
 +
| 0x4 || 0x1 || tt_isdst
 +
|-
 +
| 0x5 || 0x3 || Padding
 +
|-
 +
| 0x8 || 0x4 || tt_abbrind
 +
|-
 +
| 0xC || 0x1 || tt_ttisstd
 +
|-
 +
| 0xD || 0x1 || tt_ttisgmt
 +
|-
 +
| 0xE || 0x2 || Padding
 +
|}
    
=== TimeZoneRuleVersion ===
 
=== TimeZoneRuleVersion ===
Line 530: Line 796:  
| 0x4 || 0x4 || 0-based day-of-year.
 
| 0x4 || 0x4 || 0-based day-of-year.
 
|-
 
|-
| 0x8 || ? || Timezone name string.
+
| 0x8 || 0x8 || Timezone name string.
 
|-
 
|-
 
| 0x10 || 0x4 || 0 = no DST, 1 = DST.
 
| 0x10 || 0x4 || 0 = no DST, 1 = DST.
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