Difference between revisions of "PCIe services"

From Nintendo Switch Brew
Jump to navigation Jump to search
 
(18 intermediate revisions by 2 users not shown)
Line 6: Line 6:
 
! Cmd || Name
 
! Cmd || Name
 
|-
 
|-
−
| 0 || [[#RegisterClassDriver]]
+
| 0 || [[#RegisterClassDriver|RegisterClassDriver]]
 
|-
 
|-
−
| 1 || [[#QueryFunctionsUnregistered]]
+
| 1 || [[#QueryFunctions|QueryFunctions]]
 
|}
 
|}
  
 
== RegisterClassDriver ==
 
== RegisterClassDriver ==
−
Takes the current process handle (0xFFFF8001).
+
Takes an input Process handle and an input [[#ClassDriverConfig]]. Returns an output Event handle and an [[#ISession]].
  
−
Returns an event handle and session handle to a [[#ISession]].
+
== QueryFunctions ==
−
 
+
Takes a type-0x6 output buffer containing an array of [[#FunctionState]]. Returns an output s32 '''FunctionStateCount'''.
−
== QueryFunctionsUnregistered ==
 
−
Takes a type-6 buffer.
 
−
 
 
−
Returns a list of connected PCIe endpoint devices.
 
  
 
== ISession ==
 
== ISession ==
Line 28: Line 24:
 
! Cmd || Name
 
! Cmd || Name
 
|-
 
|-
−
| 0 || QueryFunctions
+
| 0 || [[#QueryFunctions_2|QueryFunctions]]
 +
|-
 +
| 1 || [[#AcquireFunction|AcquireFunction]]
 +
|-
 +
| 2 || [[#ReleaseFunction|ReleaseFunction]]
 
|-
 
|-
−
| 1 || AcquireFunction
+
| 3 || [[#GetFunctionState|GetFunctionState]]
 
|-
 
|-
−
| 2 || ReleaseFunction
+
| 4 || [[#GetBarProfile|GetBarProfile]]
 
|-
 
|-
−
| 3 || GetFunctionState
+
| 5 || [[#ReadConfig|ReadConfig]]
 
|-
 
|-
−
| 4 || GetBarProfile
+
| 6 || [[#WriteConfig|WriteConfig]]
 
|-
 
|-
−
| 5 || ReadConfig
+
| 7 || [[#ReadBarRegion|ReadBarRegion]]
 
|-
 
|-
−
| 6 || WriteConfig
+
| 8 || [[#WriteBarRegion|WriteBarRegion]]
 
|-
 
|-
−
| 7 || ReadBarRegion
+
| 9 || [[#FindCapability|FindCapability]]
 
|-
 
|-
−
| 8 || WriteBarRegion
+
| 10 || [[#FindExtendedCapability|FindExtendedCapability]]
 
|-
 
|-
−
| 9 || FindCapability
+
| 11 || [[#MapDma|MapDma]]
 
|-
 
|-
−
| 10 || FindExtendedCapability
+
| 12 || [[#UnmapDmaByProcVa|UnmapDmaByProcVa]]
 
|-
 
|-
−
| 11 || MapDma
+
| 13 || [[#UnmapDmaByBusAddress|UnmapDmaByBusAddress]]
 
|-
 
|-
−
| 12 || UnmapDma
+
| 14 || [[#GetDmaBusAddress|GetDmaBusAddress]]
 
|-
 
|-
−
| 13 || UnmapDmaBusAddress
+
| 15 || [[#GetDmaBusAddressRange|GetDmaBusAddressRange]]
 
|-
 
|-
−
| 14 || GetDmaBusAddress
+
| 16 || [[#SetDmaEnable|SetDmaEnable]]
 
|-
 
|-
−
| 15 || GetDmaBusAddressRange
+
| 17 || [[#AcquireIrq|AcquireIrq]]
 
|-
 
|-
−
| 16 || SetDmaEnable
+
| 18 || [[#ReleaseIrq|ReleaseIrq]]
 
|-
 
|-
−
| 17 || AcquireIrq
+
| 19 || [[#SetIrqEnable|SetIrqEnable]]
 
|-
 
|-
−
| 18 || ReleaseIrq
+
| 20 || [7.0.0+] [[#GetIrqEvent|GetIrqEvent]] ([1.0.0-6.2.0] SetAspmEnable)
 
|-
 
|-
−
| 19 || SetIrqEnable
+
| 21 || [7.0.0+] [[#SetAspmEnable|SetAspmEnable]] ([3.0.0-6.2.0] SetResetUponResumeEnable)
 
|-
 
|-
−
| 20 || SetAspmEnable
+
| 22 || [7.0.0+] [[#SetResetUponResumeEnable]] ([4.0.0-6.2.0] ResetFunction)
 
|-
 
|-
−
| 23 || [7.0.0+]
+
| 23 || [7.0.0+] [[#ResetFunction]]
 
|}
 
|}
  
−
[7.0.0+] AcquireIrq now takes an additiona 4-bytes of input, and no longer returns an output handle. SetAspmEnable now returns an output handle.
+
=== QueryFunctions ===
 +
Takes a type-0x6 output buffer containing an array of [[#FunctionState]]. Returns an output s32 '''FunctionStateCount'''.
 +
 
 +
=== AcquireFunction ===
 +
Takes an input u32 '''FunctionHandle'''. Returns an output readable Event handle.
 +
 
 +
=== ReleaseFunction ===
 +
Takes an input u32 '''FunctionHandle'''. No output.
 +
 
 +
=== GetFunctionState ===
 +
Takes an input u32 '''FunctionHandle''' and a type-0x6 output buffer containing a [[#FunctionState]]. No output.
 +
 
 +
=== GetBarProfile ===
 +
Takes two input u32s '''FunctionHandle''' and '''Bar'''. Returns an output [[#BarProfile]].
 +
 
 +
=== ReadConfig ===
 +
Takes two input u32s '''FunctionHandle''', '''Offset''' and an input [[#BusAccessWidth]]. Returns an output u32 '''Config'''.
 +
 
 +
=== WriteConfig ===
 +
Takes three input u32s '''FunctionHandle''', '''Offset''', '''Config''' and an input [[#BusAccessWidth]]. No output.
 +
 
 +
=== ReadBarRegion ===
 +
Takes three input u32s '''FunctionHandle''', '''Bar''', '''Offset''', an input [[#BusAccessWidth]] and a type-0x6 output buffer. No output.
 +
 
 +
[5.0.0+] Now takes a type-0x22 output buffer instead.
 +
 
 +
=== WriteBarRegion ===
 +
Takes three input u32s '''FunctionHandle''', '''Bar''', '''Offset''', an input [[#BusAccessWidth]] and a type-0x5 input buffer. No output.
 +
 
 +
[5.0.0+] Now takes a type-0x21 input buffer instead.
 +
 
 +
=== FindCapability ===
 +
Takes an input u32s '''FunctionHandle''' and an input [[#CapabilityId]]. Returns an output u32 '''Capability'''.
 +
 
 +
=== FindExtendedCapability ===
 +
Takes an input u32s '''FunctionHandle''' and an input [[#ExtendedCapabilityId]]. Returns an output u32 '''ExtendedCapability'''.
 +
 
 +
=== MapDma ===
 +
Takes an input u32 '''FunctionHandle''', an input [[#DmaDirection]], an input u64 '''VirtualAddress''' and an input u32 '''Size'''. Returns an output u64 '''PhysicalAddress'''.
 +
 
 +
=== UnmapDmaByProcVa ===
 +
Takes an input u32 '''FunctionHandle''' and an input u64 '''PhysicalAddress'''. No output.
 +
 
 +
=== UnmapDmaByBusAddress ===
 +
Takes an input u32 '''FunctionHandle''' and an input u64 '''BusAddress'''. No output.
 +
 
 +
=== GetDmaBusAddress ===
 +
Takes an input u32 '''FunctionHandle''', an input u64 '''VirtualAddress''' and an input u32 '''Size'''. Returns an output u64 '''BusAddress'''.
 +
 
 +
=== GetDmaBusAddressRange ===
 +
Takes an input u32 '''FunctionHandle'''. Returns two output u64s '''BusAddressRangeStart''' and '''BusAddressRangeEnd'''.
 +
 
 +
=== SetDmaEnable ===
 +
Takes an input u32 '''FunctionHandle''' and an input bool '''Enable'''. No output.
 +
 
 +
=== AcquireIrq ===
 +
Takes an input u32s '''FunctionHandle''', an input [[#IrqType]] and an input s32 '''IrqCount'''. No output.
 +
 
 +
=== ReleaseIrq ===
 +
Takes an input u32 '''FunctionHandle'''. No output.
 +
 
 +
=== SetIrqEnable ===
 +
Takes an input u32s '''FunctionHandle''', an unknown input u32 and an input bool '''Enable'''. No output.
 +
 
 +
=== GetIrqEvent ===
 +
Takes an input u32s '''FunctionHandle''' and an input [[#IrqType]]. Returns an output Event handle.
 +
 
 +
=== SetAspmEnable ===
 +
Takes an input u32 '''FunctionHandle''' and an input bool '''Enable'''. No output.
 +
 
 +
=== SetResetUponResumeEnable ===
 +
Takes an input u32 '''FunctionHandle''' and an input bool '''Enable'''. No output.
 +
 
 +
=== ResetFunction ===
 +
Takes an input u32 '''FunctionHandle''' and an unknown input u32. No output.
  
 
= pcie:log =
 
= pcie:log =
 +
This is "nn::pcie::detail::ILoggedStateManager".
 +
 
This was added with [6.0.0+].
 
This was added with [6.0.0+].
  
Line 82: Line 158:
 
! Cmd || Name
 
! Cmd || Name
 
|-
 
|-
−
| 0 ||  
+
| 0 || GetLoggedState
 +
|-
 +
| 1 || GetLoggedStateEvent
 +
|}
 +
 
 +
= ClassDriverConfig =
 +
This is "nn::pcie::ClassDriverConfig".
 +
 
 +
This is a 0x18-byte struct.
 +
 
 +
{| class="wikitable" border="1"
 +
|-
 +
! Offset
 +
! Size
 +
! Description
 +
|-
 +
| 0x00
 +
| 0x04
 +
|
 +
|-
 +
| 0x04
 +
| 0x01
 +
|
 +
|-
 +
| 0x05
 +
| 0x03
 +
| Reserved
 +
|-
 +
| 0x08
 +
| 0x04
 +
| [[#ClassCode|ClassCode]]
 +
|-
 +
| 0x0C
 +
| 0x01
 +
| Function
 +
|-
 +
| 0x0D
 +
| 0x01
 +
| Reserved
 +
|-
 +
| 0x0E
 +
| 0x02
 +
| Vid
 +
|-
 +
| 0x10
 +
| 0x02
 +
| DevId
 +
|-
 +
| 0x12
 +
| 0x01
 +
|
 +
|-
 +
| 0x13
 +
| 0x01
 +
| Reserved
 +
|-
 +
| 0x14
 +
| 0x04
 +
|
 +
|}
 +
 
 +
= ClassCode =
 +
This is a 0x4-byte struct.
 +
 
 +
{| class="wikitable" border="1"
 +
|-
 +
! Offset
 +
! Size
 +
! Description
 +
|-
 +
| 0x00
 +
| 0x01
 +
| ProgrammingInterface
 +
|-
 +
| 0x01
 +
| 0x01
 +
| SubClass
 +
|-
 +
| 0x02
 +
| 0x01
 +
| BaseClass
 +
|-
 +
| 0x03
 +
| 0x01
 +
| Reserved
 +
|}
 +
 
 +
= FunctionState =
 +
This is "nn::pcie::FunctionState".
 +
 
 +
This is a 0x28-byte struct.
 +
 
 +
{| class="wikitable" border="1"
 +
|-
 +
! Offset
 +
! Size
 +
! Description
 +
|-
 +
| 0x00
 +
| 0x04
 +
| Handle
 +
|-
 +
| 0x04
 +
| 0x04
 +
| BusNum
 +
|-
 +
| 0x08
 +
| 0x01
 +
| DevNum
 +
|-
 +
| 0x09
 +
| 0x01
 +
| FuncNum
 +
|-
 +
| 0x0A
 +
| 0x02
 +
| Vid
 +
|-
 +
| 0x0C
 +
| 0x02
 +
| DevId
 +
|-
 +
| 0x0E
 +
| 0x01
 +
| HeaderType
 +
|-
 +
| 0x0F
 +
| 0x01
 +
| Reserved
 +
|-
 +
| 0x10
 +
| 0x04
 +
| [[#ClassCode|ClassCode]]
 +
|-
 +
| 0x14
 +
| 0x01
 +
| RevisionId
 +
|-
 +
| 0x15
 +
| 0x03
 +
| Reserved
 +
|-
 +
| 0x18
 +
| 0x04
 +
|
 +
|-
 +
| 0x1C
 +
| 0x04
 +
|
 +
|-
 +
| 0x20
 +
| 0x04
 +
|
 +
|-
 +
| 0x24
 +
| 0x01
 +
| HasAssignedClient
 
|-
 
|-
−
| 1 ||  
+
| 0x25
 +
| 0x03
 +
| Reserved
 
|}
 
|}
 +
 +
= BarProfile =
 +
This is "nn::pcie::BarProfile".
 +
 +
This is a 0x18-byte struct.
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Offset
 +
! Size
 +
! Description
 +
|-
 +
| 0x00
 +
| 0x08
 +
| BaseAddress
 +
|-
 +
| 0x08
 +
| 0x08
 +
| Size
 +
|-
 +
| 0x10
 +
| 0x04
 +
| Flags
 +
|-
 +
| 0x14
 +
| 0x04
 +
| Reserved
 +
|}
 +
 +
[14.0.0+] This is a 0x20-byte struct.
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Offset
 +
! Size
 +
! Description
 +
|-
 +
| 0x00
 +
| 0x08
 +
| BaseAddress
 +
|-
 +
| 0x08
 +
| 0x08
 +
|
 +
|-
 +
| 0x10
 +
| 0x08
 +
| Size
 +
|-
 +
| 0x18
 +
| 0x04
 +
| Flags
 +
|-
 +
| 0x1C
 +
| 0x04
 +
| Reserved
 +
|}
 +
 +
= BusAccessWidth =
 +
This is "nn::pcie::BusAccessWidth".
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Value
 +
! Description
 +
|-
 +
| 0 || 8bits
 +
|-
 +
| 1 || 16bits
 +
|-
 +
| 2 || 32bits
 +
|}
 +
 +
= CapabilityId =
 +
This is "nn::pcie::CapabilityId".
 +
 +
= ExtendedCapabilityId =
 +
This is "nn::pcie::ExtendedCapabilityId".
 +
 +
= DmaDirection =
 +
This is "nn::pcie::DmaDirection".
 +
 +
This controls the [[SVC#MemoryPermission|MemoryPermission]] passed to [[SVC#MapDeviceAddressSpaceByForce|MapDeviceAddressSpaceByForce]].
 +
 +
{| class="wikitable" border="1"
 +
|-
 +
! Value
 +
! Description
 +
|-
 +
| 0 || ReadWrite
 +
|-
 +
| 1 || Write
 +
|-
 +
| 2 || Read
 +
|}
 +
 +
= IrqType =
 +
This is "nn::pcie::IrqType".
  
 
[[Category:Services]]
 
[[Category:Services]]

Latest revision as of 18:51, 5 August 2023

pcie

This is "nn::pcie::detail::IManager".

Cmd Name
0 RegisterClassDriver
1 QueryFunctions

RegisterClassDriver

Takes an input Process handle and an input #ClassDriverConfig. Returns an output Event handle and an #ISession.

QueryFunctions

Takes a type-0x6 output buffer containing an array of #FunctionState. Returns an output s32 FunctionStateCount.

ISession

This is "nn::pcie::detail::ISession".

Cmd Name
0 QueryFunctions
1 AcquireFunction
2 ReleaseFunction
3 GetFunctionState
4 GetBarProfile
5 ReadConfig
6 WriteConfig
7 ReadBarRegion
8 WriteBarRegion
9 FindCapability
10 FindExtendedCapability
11 MapDma
12 UnmapDmaByProcVa
13 UnmapDmaByBusAddress
14 GetDmaBusAddress
15 GetDmaBusAddressRange
16 SetDmaEnable
17 AcquireIrq
18 ReleaseIrq
19 SetIrqEnable
20 [7.0.0+] GetIrqEvent ([1.0.0-6.2.0] SetAspmEnable)
21 [7.0.0+] SetAspmEnable ([3.0.0-6.2.0] SetResetUponResumeEnable)
22 [7.0.0+] #SetResetUponResumeEnable ([4.0.0-6.2.0] ResetFunction)
23 [7.0.0+] #ResetFunction

QueryFunctions

Takes a type-0x6 output buffer containing an array of #FunctionState. Returns an output s32 FunctionStateCount.

AcquireFunction

Takes an input u32 FunctionHandle. Returns an output readable Event handle.

ReleaseFunction

Takes an input u32 FunctionHandle. No output.

GetFunctionState

Takes an input u32 FunctionHandle and a type-0x6 output buffer containing a #FunctionState. No output.

GetBarProfile

Takes two input u32s FunctionHandle and Bar. Returns an output #BarProfile.

ReadConfig

Takes two input u32s FunctionHandle, Offset and an input #BusAccessWidth. Returns an output u32 Config.

WriteConfig

Takes three input u32s FunctionHandle, Offset, Config and an input #BusAccessWidth. No output.

ReadBarRegion

Takes three input u32s FunctionHandle, Bar, Offset, an input #BusAccessWidth and a type-0x6 output buffer. No output.

[5.0.0+] Now takes a type-0x22 output buffer instead.

WriteBarRegion

Takes three input u32s FunctionHandle, Bar, Offset, an input #BusAccessWidth and a type-0x5 input buffer. No output.

[5.0.0+] Now takes a type-0x21 input buffer instead.

FindCapability

Takes an input u32s FunctionHandle and an input #CapabilityId. Returns an output u32 Capability.

FindExtendedCapability

Takes an input u32s FunctionHandle and an input #ExtendedCapabilityId. Returns an output u32 ExtendedCapability.

MapDma

Takes an input u32 FunctionHandle, an input #DmaDirection, an input u64 VirtualAddress and an input u32 Size. Returns an output u64 PhysicalAddress.

UnmapDmaByProcVa

Takes an input u32 FunctionHandle and an input u64 PhysicalAddress. No output.

UnmapDmaByBusAddress

Takes an input u32 FunctionHandle and an input u64 BusAddress. No output.

GetDmaBusAddress

Takes an input u32 FunctionHandle, an input u64 VirtualAddress and an input u32 Size. Returns an output u64 BusAddress.

GetDmaBusAddressRange

Takes an input u32 FunctionHandle. Returns two output u64s BusAddressRangeStart and BusAddressRangeEnd.

SetDmaEnable

Takes an input u32 FunctionHandle and an input bool Enable. No output.

AcquireIrq

Takes an input u32s FunctionHandle, an input #IrqType and an input s32 IrqCount. No output.

ReleaseIrq

Takes an input u32 FunctionHandle. No output.

SetIrqEnable

Takes an input u32s FunctionHandle, an unknown input u32 and an input bool Enable. No output.

GetIrqEvent

Takes an input u32s FunctionHandle and an input #IrqType. Returns an output Event handle.

SetAspmEnable

Takes an input u32 FunctionHandle and an input bool Enable. No output.

SetResetUponResumeEnable

Takes an input u32 FunctionHandle and an input bool Enable. No output.

ResetFunction

Takes an input u32 FunctionHandle and an unknown input u32. No output.

pcie:log

This is "nn::pcie::detail::ILoggedStateManager".

This was added with [6.0.0+].

Cmd Name
0 GetLoggedState
1 GetLoggedStateEvent

ClassDriverConfig

This is "nn::pcie::ClassDriverConfig".

This is a 0x18-byte struct.

Offset Size Description
0x00 0x04
0x04 0x01
0x05 0x03 Reserved
0x08 0x04 ClassCode
0x0C 0x01 Function
0x0D 0x01 Reserved
0x0E 0x02 Vid
0x10 0x02 DevId
0x12 0x01
0x13 0x01 Reserved
0x14 0x04

ClassCode

This is a 0x4-byte struct.

Offset Size Description
0x00 0x01 ProgrammingInterface
0x01 0x01 SubClass
0x02 0x01 BaseClass
0x03 0x01 Reserved

FunctionState

This is "nn::pcie::FunctionState".

This is a 0x28-byte struct.

Offset Size Description
0x00 0x04 Handle
0x04 0x04 BusNum
0x08 0x01 DevNum
0x09 0x01 FuncNum
0x0A 0x02 Vid
0x0C 0x02 DevId
0x0E 0x01 HeaderType
0x0F 0x01 Reserved
0x10 0x04 ClassCode
0x14 0x01 RevisionId
0x15 0x03 Reserved
0x18 0x04
0x1C 0x04
0x20 0x04
0x24 0x01 HasAssignedClient
0x25 0x03 Reserved

BarProfile

This is "nn::pcie::BarProfile".

This is a 0x18-byte struct.

Offset Size Description
0x00 0x08 BaseAddress
0x08 0x08 Size
0x10 0x04 Flags
0x14 0x04 Reserved

[14.0.0+] This is a 0x20-byte struct.

Offset Size Description
0x00 0x08 BaseAddress
0x08 0x08
0x10 0x08 Size
0x18 0x04 Flags
0x1C 0x04 Reserved

BusAccessWidth

This is "nn::pcie::BusAccessWidth".

Value Description
0 8bits
1 16bits
2 32bits

CapabilityId

This is "nn::pcie::CapabilityId".

ExtendedCapabilityId

This is "nn::pcie::ExtendedCapabilityId".

DmaDirection

This is "nn::pcie::DmaDirection".

This controls the MemoryPermission passed to MapDeviceAddressSpaceByForce.

Value Description
0 ReadWrite
1 Write
2 Read

IrqType

This is "nn::pcie::IrqType".

Retrieved from "https://switchbrew.org/w/index.php?title=PCIe_services&oldid=12407"