Nintendo Switch Brew

Changes

NV services (view source)

Revision as of 16:19, 14 April 2024

1,748 bytes added ,  14 April
→‎Notes
Line 66: Line 66:  
QueryEvent is only supported on (and implemented differently on):
 
QueryEvent is only supported on (and implemented differently on):
 
* /dev/nvhost-gpu
 
* /dev/nvhost-gpu
−
** 1: SmException_BptIntReport
+
** EvtId=1: SmException_BptIntReport
−
** 2: SmException_BptPauseReport
+
** EvtId=2: SmException_BptPauseReport
−
** 3: ErrorNotifierEvent
+
** EvtId=3: ErrorNotifierEvent
−
* /dev/nvhost-ctrl: Used to get events for SyncPts.
+
* /dev/nvhost-ctrl: Used to get events for syncpts.
−
** If bit31-28 is 1, then lower 16-bits contain event_id, bit27-16 contain syncpt_id.  
+
** EvtId=(event_slot | ((syncpt_id & 0xFFF) << 16) | (is_valid << 28)): New format used by [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT|NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]/[[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX|NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX]].
−
** If bit31-28 is 0, then lower 4-bits contain event_id, bit31-4 contains syncpt_id.
+
** EvtId=(event_slot | (syncpt_id << 4)): Old format used by [[#NVHOST_IOCTL_CTRL_SYNCPT_WAITEX|NVHOST_IOCTL_CTRL_SYNCPT_WAITEX]].
 
* /dev/nvhost-ctrl-gpu
 
* /dev/nvhost-ctrl-gpu
−
** 1: Returns error_event_handle.
+
** EvtId=1: Returns error_event_handle.
−
** 2: Returns unknown event.
+
** EvtId=2: Returns unknown event.
 
* /dev/nvhost-dbg-gpu
 
* /dev/nvhost-dbg-gpu
−
** Ignores event_id.
+
** Ignores EvtId.
    
== MapSharedMem ==
 
== MapSharedMem ==
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| 6 || [[#Reset|Reset]]
 
| 6 || [[#Reset|Reset]]
 
|-
 
|-
−
| 7 || [3.0.0+]
+
| 7 || [3.0.0+] [[#GetAruid2|GetAruid2]]
 
|}
 
|}
   Line 210: Line 210:  
== Reset ==
 
== Reset ==
 
No input. Returns an output u32 '''Err'''.
 
No input. Returns an output u32 '''Err'''.
 +
 +
== GetAruid2 ==
 +
Unofficial name.
 +
 +
No input. Returns an output u64 '''Aruid''', an output bool '''IsCoreDumpEnabled''' and an output u32 '''Err'''.
    
= nvgem:cd =
 
= nvgem:cd =
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| 2 || [1.0.0-8.1.0] [[#ReadNextBlock|ReadNextBlock]]
 
| 2 || [1.0.0-8.1.0] [[#ReadNextBlock|ReadNextBlock]]
 
|-
 
|-
−
| 3 || [8.0.0+]
+
| 3 || [8.0.0+] [[#GetNextBlockSize|GetNextBlockSize]]
 
|-
 
|-
−
| 4 || [8.0.0+]
+
| 4 || [8.0.0+] [[#ReadNextBlock2|ReadNextBlock2]]
 
|}
 
|}
   Line 237: Line 242:  
== ReadNextBlock ==
 
== ReadNextBlock ==
 
Takes a type-0x6 output buffer. Returns an output u32 '''Err'''.
 
Takes a type-0x6 output buffer. Returns an output u32 '''Err'''.
 +
 +
== GetNextBlockSize ==
 +
Unofficial name.
 +
 +
No input. Returns an output u64 '''Size''' and an output u32 '''Err'''.
 +
 +
== ReadNextBlock2 ==
 +
Unofficial name.
 +
 +
Takes a type-0x6 output buffer and two input u64s '''Size''' and '''Offset'''. Returns an output u64 '''OutSize''' and an output u32 '''Err'''.
    
= nvdbg:d =
 
= nvdbg:d =
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| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]
 
| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]
 
|-
 
|-
−
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_SINGLE]]
+
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX]]
 
|-
 
|-
 
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_ALLOC_EVENT]]
 
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_ALLOC_EVENT]]
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| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENT_BATCH]]
 
| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENT_BATCH]]
 
|-
 
|-
−
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL]]
+
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_GET_SHIFT]]
 
|}
 
|}
   Line 315: Line 330:  
   struct {
 
   struct {
 
     __in u32 id;
 
     __in u32 id;
−
     __in u32 lock;        // (0==unlock; 1==lock)
+
     __in u32 lock;        // 0=unlock, 1=lock
 
   };
 
   };
   Line 361: Line 376:     
   struct {
 
   struct {
−
     __in u32 event_id;         // 0x00 to 0x3F
+
     __in u32 event_slot;       // 0x00 to 0x3F
 
   };
 
   };
    
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT ===
 
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT ===
−
Waits on a syncpt using events. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (((('''id''' & 0xFFF) << 0x10) | 0x10000000) | '''event_id''').
+
Waits on a syncpt using events. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to ('''event_slot''' | (('''syncpt_id''' & 0xFFF) << 16) | ('''is_valid''' << 28)).
    
   struct {
 
   struct {
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   };
 
   };
   −
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_SINGLE ===
+
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX ===
−
Waits on a syncpt using a specific event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (('''id''' * 0x10) | '''event_id''').
+
Waits on a syncpt using a specific event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to ('''event_slot''' | ('''syncpt_id''' << 4)).
    
   struct {
 
   struct {
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     __in    u32 thresh;
 
     __in    u32 thresh;
 
     __in    s32 timeout;
 
     __in    s32 timeout;
−
     __inout u32 value;          // in=event_id; out=syncpt_value
+
     __inout u32 value;          // in=event_slot; out=syncpt_value
 
   };
 
   };
   Line 388: Line 403:     
   struct {
 
   struct {
−
     __in u32 event_id;           // 0x00 to 0x3F
+
     __in u32 event_slot;         // 0x00 to 0x3F
 
   };
 
   };
   Line 395: Line 410:     
   struct {
 
   struct {
−
     __in u32 event_id;           // 0x00 to 0x3F
+
     __in u32 event_slot;         // 0x00 to 0x3F
 
   };
 
   };
   Line 402: Line 417:     
   struct {
 
   struct {
−
     __in u64 event_id_mask;     // 64-bit bitfield where each bit represents one event
+
     __in u64 event_slot_mask;   // 64-bit bitfield where each bit represents one event
 
   };
 
   };
   −
=== NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL ===
+
=== NVHOST_IOCTL_CTRL_SYNCPT_GET_SHIFT ===
−
If event FIFO is enabled, returns the maximum channel number.
+
Returns the syncpt shift value.
    
   struct {
 
   struct {
−
     __out u32 max_channel;       // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
+
     __out u32 syncpt_shift;     // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
 
   };
 
   };
   Line 594: Line 609:  
| 0xC0040220 || Inout || 4 || NVDISP_CTRL_SUSPEND
 
| 0xC0040220 || Inout || 4 || NVDISP_CTRL_SUSPEND
 
|-
 
|-
−
| 0x80010224 || Out || 1 || [11.0.0+]
+
| 0x80010224 || Out || 1 || [11.0.0+] NVDISP_CTRL_IS_DISPLAY_OLED
 
|}
 
|}
   Line 651: Line 666:  
| 0x80080221 || Out || 8 || [10.0.0+] [[#NVDISP_GET_BACKLIGHT_RANGE]]
 
| 0x80080221 || Out || 8 || [10.0.0+] [[#NVDISP_GET_BACKLIGHT_RANGE]]
 
|-
 
|-
−
| 0x40040222 || In || 4 || [10.0.0+] [[#NVDISP_SET_BACKLIGHT]]
+
| 0x40040222 || In || 4 || [10.0.0+] [[#NVDISP_SET_BACKLIGHT_RANGE_MAX]]
 
|-
 
|-
−
| 0x40040223 || In || 4 || [11.0.0+]  
+
| 0x40040223 || In || 4 || [11.0.0+] [[#NVDISP_SET_BACKLIGHT_RANGE_MIN]]
 
|-
 
|-
 
| 0x401C0225 || In || 28 || [11.0.0+] [[#NVDISP_SEND_PANEL_MSG]]
 
| 0x401C0225 || In || 28 || [11.0.0+] [[#NVDISP_SEND_PANEL_MSG]]
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   };
 
   };
   −
=== NVDISP_SET_BACKLIGHT ===
+
=== NVDISP_SET_BACKLIGHT_RANGE_MAX ===
−
Sets the value for the intensity of the display's backlight.
+
Sets the maximum value for the intensity of the display's backlight.
    
   struct {
 
   struct {
−
     __in u32 val;
+
     __in u32 max;
 +
  };
 +
 
 +
=== NVDISP_SET_BACKLIGHT_RANGE_MIN ===
 +
Sets the minimum value for the intensity of the display's backlight.
 +
 
 +
  struct {
 +
    __in u32 min;
 
   };
 
   };
   Line 900: Line 922:  
   struct {
 
   struct {
 
     __in u32 fence_id;
 
     __in u32 fence_id;
−
     __in u32 fence_thresh;
+
     __in u32 fence_value;
 
     __in u32 swap_interval;
 
     __in u32 swap_interval;
 
   };
 
   };
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=== NVGPU_AS_IOCTL_GET_VA_REGIONS ===
 
=== NVGPU_AS_IOCTL_GET_VA_REGIONS ===
 
Nintendo's custom implementation to get rid of pointer in struct.
 
Nintendo's custom implementation to get rid of pointer in struct.
 +
 +
Uses [[#Ioctl3|Ioctl3]].
    
   struct va_region {
 
   struct va_region {
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| 0xC018441A || Inout || 24 || NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA
 
| 0xC018441A || Inout || 24 || NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA
 
|-
 
|-
−
| 0xC020441B || Inout || 32 || [11.0.0+]
+
| 0xC020441B || Inout || 32 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA_EX
 
|-
 
|-
−
| 0xC084441C || Inout || 132 || [11.0.0+]
+
| 0xC084441C || Inout || 132 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_SETTINGS
 
|-
 
|-
−
| 0xC018441D || Inout || 24 || [11.0.0+]
+
| 0xC018441D || Inout || 24 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_SERIAL_NUMBER
 
|-
 
|-
−
| 0xC020441E || Inout || 32 || [11.0.0+]
+
| 0xC020441E || Inout || 32 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_GPU_VA_RANGE_PAGES
 
|}
 
|}
   Line 1,587: Line 1,611:  
|-
 
|-
 
| /dev/nvhost-display || Display
 
| /dev/nvhost-display || Display
 +
|-
 +
| /dev/nvhost-tsec || TSEC
 
|}
 
|}
   Line 1,700: Line 1,726:  
   };
 
   };
 
    
 
    
−
   
   struct {
 
   struct {
 
     __in    u32 num_cmdbufs;
 
     __in    u32 num_cmdbufs;
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   struct {
 
   struct {
 
     __in u32 num_entries;
 
     __in u32 num_entries;
−
     __in u32 flags;
+
     __in u32 flags;           // bit0: vpr_enabled
 
   };
 
   };
   Line 1,850: Line 1,875:  
   struct fence {
 
   struct fence {
 
     u32 id;
 
     u32 id;
−
     u32 thresh;
+
     u32 value;
 
   };
 
   };
 
    
 
    
 
   struct gpfifo_entry {
 
   struct gpfifo_entry {
−
     u64 entry;                               // gpu_iova | (unk_2bits << 40) | (size << 42) | (unk_flag << 63)
+
     u32 entry0;                             // gpu_iova_lo
 +
    u32 entry1;                              // gpu_iova_hi | (allow_flush << 8) | (is_push_buf << 9) | (size << 10) | (sync << 31)
 
   };
 
   };
 
    
 
    
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     __in    u64 gpfifo;                      // (ignored) pointer to gpfifo fence structs
 
     __in    u64 gpfifo;                      // (ignored) pointer to gpfifo fence structs
 
     __in    u32 num_entries;                // number of fence objects being submitted
 
     __in    u32 num_entries;                // number of fence objects being submitted
−
     __in   u32 flags;
+
     union {
 +
      __out u32 detailed_error;
 +
      __in u32 flags;                      // bit0: fence_wait, bit1: fence_get, bit2: hw_format, bit3: sync_fence, bit4: suppress_wfi, bit5: skip_buffer_refcounting
 +
    };
 
     __inout struct fence fence_out;          // returned new fence object for others to wait on
 
     __inout struct fence fence_out;          // returned new fence object for others to wait on
 
     __in    struct gpfifo_entry entries[];  // depends on num_entries
 
     __in    struct gpfifo_entry entries[];  // depends on num_entries
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   struct {
 
   struct {
−
     __out u32 error_info[32];    // first word is an error code (0=no_error, 1=gr_error, 2=gr_error, 3=invalid, 4=invalid)
+
     __out u32 error_info[32];    // first word is an error code (0=no_error, 1=mmu_error, 2=gr_error, 3=pbdma_error, 4=timeout)
 
   };
 
   };
   Line 1,961: Line 1,990:  
  struct fence {
 
  struct fence {
 
     u32 id;
 
     u32 id;
−
     u32 thresh;
+
     u32 value;
 
  };
 
  };
 
   
 
   
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   __in    u32 num_entries;
 
   __in    u32 num_entries;
 
   __in    u32 num_jobs;
 
   __in    u32 num_jobs;
−
   __in    u32 flags;
+
   __in    u32 flags;                       // bit0: vpr_enabled
 
   __out  struct fence fence_out;          // returned new fence object for others to wait on
 
   __out  struct fence fence_out;          // returned new fence object for others to wait on
 
   __in    u32 reserved[3];                // ignored
 
   __in    u32 reserved[3];                // ignored
Line 2,230: Line 2,259:     
When the gpfifo data in the gpu_va buffers specified by the submitted gpfifo entries is invalid(?), eventually the user-process will be force-terminated after using the submit-gpfifo ioctl. It's unknown how exactly this is done.
 
When the gpfifo data in the gpu_va buffers specified by the submitted gpfifo entries is invalid(?), eventually the user-process will be force-terminated after using the submit-gpfifo ioctl. It's unknown how exactly this is done.
 +
 +
GPU rendering (GPFIFO) is only used by applets/Applications. All sysmodules doing any gfx-display uses software rendering. During system-boot, GPU GPFIFO is not used until the applets are launched.
    
[[Category:Services]]
 
[[Category:Services]]
Retrieved from "https://switchbrew.org/wiki/Special:MobileDiff/11480...12758"