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Line 34: Line 34:
| 6 || [[#GetStatus]]
| 6 || [[#GetStatus]]
|-
|-
| 7 || [[#SetAruidForTest]]
| 7 || [[#SetAruidWithoutCheck]]
|-
|-
| 8 || [[#SetAruid]]
| 8 || [[#SetAruid]]
|-
|-
| 9 || [[#DumpGraphicsMemoryInfo]]
| 9 || [[#DumpStatus]]
|-
|-
| 10 || [3.0.0+] [[#InitializeDevtools]]
| 10 || [3.0.0+] [[#InitializeDevtools]]
Line 88: Line 88:
Takes no input. Returns 0x10-bytes and an output u32 ('''error_code''').
Takes no input. Returns 0x10-bytes and an output u32 ('''error_code''').


== SetAruidForTest ==
== SetAruidWithoutCheck ==
Takes an input u64 which must [[IPC_Marshalling|match]] the user-process PID ([[Applet_Manager_services#AppletResourceUserId|AppletResourceUserId]]). Returns an output u32 ('''error_code''').
Takes an input u64 which must [[IPC_Marshalling|match]] the user-process PID ([[Applet_Manager_services#AppletResourceUserId|AppletResourceUserId]]). Returns an output u32 ('''error_code''').


Line 94: Line 94:
Takes a PID-descriptor and an u64 which must [[IPC_Marshalling|match]] the user-process PID ([[Applet_Manager_services#AppletResourceUserId|AppletResourceUserId]]). Returns an output u32 ('''error_code''').
Takes a PID-descriptor and an u64 which must [[IPC_Marshalling|match]] the user-process PID ([[Applet_Manager_services#AppletResourceUserId|AppletResourceUserId]]). Returns an output u32 ('''error_code''').


== DumpGraphicsMemoryInfo ==
== DumpStatus ==
No input or output. Does nothing.
No input or output.


== InitializeDevtools ==
== InitializeDevtools ==
Takes a copy-handle and an input u32. Returns an output u32 ('''error_code''').
Takes a copy-handle ('''transfer_memory''') and an input u32 ('''transfer_memory_size'''). Returns an output u32 ('''error_code''').


== Ioctl2 ==
== Ioctl2 ==
Line 119: Line 119:
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  Bits
!  Bits
!  Name
!  Description
!  Description
|-
|-
| 0
| 0
| Can access [[#/dev/nvhost-gpu|/dev/nvhost-gpu]], [[#/dev/nvhost-ctrl-gpu|/dev/nvhost-ctrl-gpu]] and [[#/dev/nvhost-as-gpu|/dev/nvhost-as-gpu]].
| NvDrvPermission_Gpu
| Can access [[#Channels|/dev/nvhost-gpu]], [[#/dev/nvhost-ctrl-gpu|/dev/nvhost-ctrl-gpu]] and [[#/dev/nvhost-as-gpu|/dev/nvhost-as-gpu]].
|-
|-
| 1
| 1
| NvDrvPermission_GpuDebug
| Can access [[#/dev/nvhost-dbg-gpu|/dev/nvhost-dbg-gpu]] and [[#/dev/nvhost-prof-gpu|/dev/nvhost-prof-gpu]].
| Can access [[#/dev/nvhost-dbg-gpu|/dev/nvhost-dbg-gpu]] and [[#/dev/nvhost-prof-gpu|/dev/nvhost-prof-gpu]].
|-
|-
| 2
| 2
| NvDrvPermission_GpuSchedule
| Can access [[#/dev/nvsched-ctrl|/dev/nvsched-ctrl]].
| Can access [[#/dev/nvsched-ctrl|/dev/nvsched-ctrl]].
|-
|-
| 3
| 3
| NvDrvPermission_VIC
| Can access [[#Channels|/dev/nvhost-vic]].
| Can access [[#Channels|/dev/nvhost-vic]].
|-
|-
| 4
| 4
| NvDrvPermission_VideoEncoder
| Can access [[#Channels|/dev/nvhost-msenc]].
| Can access [[#Channels|/dev/nvhost-msenc]].
|-
|-
| 5
| 5
| NvDrvPermission_VideoDecoder
| Can access [[#Channels|/dev/nvhost-nvdec]].
| Can access [[#Channels|/dev/nvhost-nvdec]].
|-
|-
| 6
| 6
|  
| NvDrvPermission_TSEC
| Can access [[#Channels|/dev/nvhost-tsec]].
|-
|-
| 7
| 7
| NvDrvPermission_JPEG
| Can access [[#Channels|/dev/nvhost-nvjpg]].
| Can access [[#Channels|/dev/nvhost-nvjpg]].
|-
|-
| 8
| 8
| NvDrvPermission_Display
| Can access [[#Channels|/dev/nvhost-display]], [[#/dev/nvcec-ctrl|/dev/nvcec-ctrl]], [[#/dev/nvhdcp_up-ctrl|/dev/nvhdcp_up-ctrl]], [[#/dev/nvdisp-ctrl|/dev/nvdisp-ctrl]], [[#/dev/nvdisp-disp0, /dev/nvdisp-disp1|/dev/nvdisp-disp0]], [[#/dev/nvdisp-disp0, /dev/nvdisp-disp1|/dev/nvdisp-disp1]], [[#/dev/nvdcutil-disp0, /dev/nvdcutil-disp1|/dev/nvdcutil-disp0]] and [[#/dev/nvdcutil-disp0, /dev/nvdcutil-disp1|/dev/nvdcutil-disp1]].
| Can access [[#Channels|/dev/nvhost-display]], [[#/dev/nvcec-ctrl|/dev/nvcec-ctrl]], [[#/dev/nvhdcp_up-ctrl|/dev/nvhdcp_up-ctrl]], [[#/dev/nvdisp-ctrl|/dev/nvdisp-ctrl]], [[#/dev/nvdisp-disp0, /dev/nvdisp-disp1|/dev/nvdisp-disp0]], [[#/dev/nvdisp-disp0, /dev/nvdisp-disp1|/dev/nvdisp-disp1]], [[#/dev/nvdcutil-disp0, /dev/nvdcutil-disp1|/dev/nvdcutil-disp0]] and [[#/dev/nvdcutil-disp0, /dev/nvdcutil-disp1|/dev/nvdcutil-disp1]].
|-
|-
| 9
| 9
|  
| NvDrvPermission_ImportMemory
| Can duplicate [[#/dev/nvmap|nvmap]] handles from other processes with [[#NVMAP_IOC_FROM_ID|NVMAP_IOC_FROM_ID]].
|-
|-
| 10
| 10
| Can use [[#SetAruidForTest|SetAruidForTest]].
| NvDrvPermission_NoCheckedAruid
| Can use [[#SetAruidWithoutCheck|SetAruidWithoutCheck]].
|-
|-
| 11
| 11
|
| Can use [[#SetGraphicsFirmwareMemoryMarginEnabled|SetGraphicsFirmwareMemoryMarginEnabled]].  
| Can use [[#SetGraphicsFirmwareMemoryMarginEnabled|SetGraphicsFirmwareMemoryMarginEnabled]].  
|-
|-
| 12
| 12
|  
|
| Can duplicate exported [[#/dev/nvmap|nvmap]] handles from other processes with [[#NVMAP_IOC_FROM_ID|NVMAP_IOC_FROM_ID]].
|-
|-
| 13
| 13
|
|  
|  
|-
|-
| 14
| 14
|  
|
| Can use [[#NVMAP_IOC_EXPORT_FOR_ARUID|NVMAP_IOC_EXPORT_FOR_ARUID]] and [[#NVMAP_IOC_REMOVE_EXPORT_FOR_ARUID|NVMAP_IOC_REMOVE_EXPORT_FOR_ARUID]].
|-
|-
| 15
| 15
|
|  
|  
|-
| 16-31
| Unused.
|}
|}


Line 203: Line 217:
| 0xC183001B || Inout || 387 || [[#NVHOST_IOCTL_CTRL_GET_CONFIG]]
| 0xC183001B || Inout || 387 || [[#NVHOST_IOCTL_CTRL_GET_CONFIG]]
|-
|-
| 0xC004001C || Inout || 4 || [[#NVHOST_IOCTL_CTRL_EVENT_SIGNAL]]
| 0xC004001C || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_CLEAR_EVENT_WAIT]]
|-
|-
| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_EVENT_WAIT]]
| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_EVENT_WAIT]]
|-
|-
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_EVENT_WAIT_ASYNC]]
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_EVENT_WAIT_ASYNC]]
|-
|-
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_EVENT_REGISTER]]
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_REGISTER_EVENT]]
|-
|-
| 0xC0040020 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_EVENT_UNREGISTER]]
| 0xC0040020 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_UNREGISTER_EVENT]]
|-
|-
| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_EVENT_KILL]]
| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENTS]]
|-
|-
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL]]
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL]]
Line 289: Line 303:
   };
   };


=== NVHOST_IOCTL_CTRL_EVENT_SIGNAL ===
=== NVHOST_IOCTL_CTRL_SYNCPT_CLEAR_EVENT_WAIT ===
Signals an user event. Exclusive to the Switch.
Clears the wait signal of an event. Exclusive to the Switch.


   struct {
   struct {
     __in u32 user_event_id;     // ranges from 0x00 to 0x3F
     __in u32 event_slot;         // ranges from 0x00 to 0x3F
   };
   };


=== NVHOST_IOCTL_CTRL_EVENT_WAIT ===
=== NVHOST_IOCTL_CTRL_SYNCPT_EVENT_WAIT ===
Waits on an event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (('''syncpt_id''' << 0x10) | 0x10000000).
Waits on an event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (('''syncpt_id''' << 0x10) | 0x10000000).


Depending on '''threshold''', an '''user_event_id''' may be returned for using with other event ioctls.
Depending on '''threshold''', an '''event_slot''' may be returned for using with other event ioctls.


   struct {
   struct {
Line 305: Line 319:
     __in    u32 threshold;
     __in    u32 threshold;
     __in    s32 timeout;
     __in    s32 timeout;
     __inout u32 value;          // in=user_event_id (ignored); out=syncpt_value or user_event_id
     __inout u32 value;          // in=event_slot (ignored); out=syncpt_value or event_slot
   };
   };


=== NVHOST_IOCTL_CTRL_EVENT_WAIT_ASYNC ===
=== NVHOST_IOCTL_CTRL_SYNCPT_EVENT_WAIT_ASYNC ===
Waits on an event (async version). If waiting fails, returns error code 0x0B (BadValue).
Waits on an event (async version). If waiting fails, returns error code 0x0B (BadValue).


Depending on '''threshold''', an '''user_event_id''' may be returned for using with other event ioctls.
Depending on '''threshold''', an '''event_slot''' may be returned for using with other event ioctls.


   struct {
   struct {
Line 317: Line 331:
     __in    u32 threshold;
     __in    u32 threshold;
     __in    u32 timeout;
     __in    u32 timeout;
     __inout u32 value;          // in=user_event_id (ignored); out=syncpt_value or user_event_id
     __inout u32 value;          // in=event_slot (ignored); out=syncpt_value or event_slot
   };
   };


=== NVHOST_IOCTL_CTRL_EVENT_REGISTER ===
=== NVHOST_IOCTL_CTRL_SYNCPT_REGISTER_EVENT ===
Registers an user event. Exclusive to the Switch.  
Registers an event. Exclusive to the Switch.  


   struct {
   struct {
     __in u32 user_event_id;     // ranges from 0x00 to 0x3F
     __in u32 event_slot;         // ranges from 0x00 to 0x3F
   };
   };


=== NVHOST_IOCTL_CTRL_EVENT_UNREGISTER ===
=== NVHOST_IOCTL_CTRL_SYNCPT_UNREGISTER_EVENT ===
Unregisters an user event. Exclusive to the Switch.  
Unregisters an event. Exclusive to the Switch.  


   struct {
   struct {
     __in u32 user_event_id;     // ranges from 0x00 to 0x3F
     __in u32 event_slot;         // ranges from 0x00 to 0x3F
   };
   };


=== NVHOST_IOCTL_CTRL_EVENT_KILL ===
=== NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENTS ===
Kills user events. Exclusive to the Switch.  
Frees events. Exclusive to the Switch.  


   struct {
   struct {
     __in u64 user_events;       // 64-bit bitfield where each bit represents one event
     __in u64 events;             // 64-bit bitfield where each bit represents one event
   };
   };


Line 345: Line 359:


   struct {
   struct {
     __out u32 max_channel;     // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
     __out u32 max_channel;       // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
   };
   };


Line 514: Line 528:
! Value || Direction || Size || Description
! Value || Direction || Size || Description
|-
|-
| 0x80040212 || Out || 4 || NVDISP_CTRL_GET_NUM_OUTPUTS
| 0x80040212 || Out || 4 || NVDISP_CTRL_NUM_OUTPUTS
|-
|-
| 0xC0140213 || Inout || 20 || NVDISP_CTRL_GET_OUTPUT_PROPERTIES
| 0xC0140213 || Inout || 20 || NVDISP_CTRL_GET_DISPLAY_PROPERTIES
|-
|-
| 0xC1100214 || Inout || 272 || NVDISP_CTRL_GET_OUTPUT_EDID
| 0xC1100214 || Inout || 272 || NVDISP_CTRL_QUERY_EDID
|-
|-
| 0xC0080216</br>([1.0.0-3.0.0] 0xC0040216) || Inout || 8</br>([1.0.0-3.0.0] 4) || NVDISP_CTRL_GET_EXT_HPD_IN_OUT_EVENTS</br>([1.0.0-3.0.0] NVDISP_CTRL_GET_EXT_HPD_IN_EVENT)
| 0xC0080216</br>([1.0.0-3.0.0] 0xC0040216) || Inout || 8</br>([1.0.0-3.0.0] 4) || NVDISP_CTRL_GET_EXT_HPD_IN_OUT_EVENTS</br>([1.0.0-3.0.0] NVDISP_CTRL_GET_EXT_HPD_IN_EVENT)
Line 528: Line 542:
| 0xC0100219 || Inout || 16 || NVDISP_CTRL_GET_VBLANK_HEAD1_EVENT
| 0xC0100219 || Inout || 16 || NVDISP_CTRL_GET_VBLANK_HEAD1_EVENT
|-
|-
| 0xC0040220 || Inout || 4 || NVDISP_CTRL_GET_HPD_IRQ
| 0xC0040220 || Inout || 4 || NVDISP_CTRL_SUSPEND
|}
|}


Line 547: Line 561:
| 0x430C0206 || In || 780 || NVDISP_SET_LUT
| 0x430C0206 || In || 780 || NVDISP_SET_LUT
|-
|-
| 0x40010207 || In || 1 || NVDISP_ENABLE_DISABLE_CRC
| 0x40010207 || In || 1 || NVDISP_CONFIG_CRC
|-
|-
| 0x80040208 || Out || 4 || NVDISP_GET_CRC
| 0x80040208 || Out || 4 || NVDISP_GET_CRC
Line 582: Line 596:
|-
|-
| 0xC004021F || Inout || 4 || NVDISP_GET_WINMASK
| 0xC004021F || Inout || 4 || NVDISP_GET_WINMASK
|-
| 0x80080221 || Out || 8 || [10.0.0+] NVDISP_GET_BACKLIGHT_RANGE
|-
| 0x40040222 || In || 4 || [10.0.0+] NVDISP_SET_BACKLIGHT
|}
|}


Line 607: Line 625:
! Value || Direction || Size || Description
! Value || Direction || Size || Description
|-
|-
| 0xC4880401 || Inout || 1160 || NVHDCP_READ_M
| 0xC4880401 || Inout || 1160 || NVHDCP_READ_STATUS
|-
|-
| 0xC4880402 || Inout || 1160 || NVHDCP_READ_S
| 0xC4880402 || Inout || 1160 || NVHDCP_READ_M
|-
|-
| 0x40010403 || In || 1 || NVHDCP_ON_OFF
| 0x40010403 || In || 1 || NVHDCP_USER_ENABLE
|-
|-
| 0xC0080404 || Inout || 8 || NVHDCP_READ_EVENT
| 0xC0080404 || Inout || 8 || NVHDCP_READ_EVENT
|-
|-
| 0xC0010405 || Inout || 1 || NVHDCP_EVENTS_ON_OFF
| 0xC0010405 || Inout || 1 || NVHDCP_EVENTS_ENABLE
|}
|}


Line 622: Line 640:
! Value || Direction || Size || Description
! Value || Direction || Size || Description
|-
|-
| 0x40010501 || In || 1 || NVDCUTIL_SW_HOTPLUG_IN_OUT
| 0x40010501 || In || 1 || NVDCUTIL_SW_HOTPLUG
|-
|-
| 0x40010502 || In || 1 || NVDCUTIL_VIRTUAL_EDID_ON_OFF
| 0x40010502 || In || 1 || NVDCUTIL_VIRTUAL_EDID_ENABLE
|-
|-
| 0x42040503 || In || 1056 || NVDCUTIL_VIRTUAL_EDID_SET_DATA
| 0x42040503 || In || 1056 || NVDCUTIL_VIRTUAL_EDID_SET_DATA
Line 630: Line 648:
| 0x803C0504 || Out || 60 || NVDCUTIL_GET_MODE
| 0x803C0504 || Out || 60 || NVDCUTIL_GET_MODE
|-
|-
| 0x40010505 || In || 1 || NVDCUTIL_TELEMETRY_TEST_ON_OFF
| 0x40010505 || In || 1 || NVDCUTIL_TELEMETRY_TEST_ENABLE
|-
|-
| 0x400C0506 || In || 12 || NVDCUTIL_DSI_PACKET_SHORT_WRITE
| 0x400C0506 || In || 12 || NVDCUTIL_DSI_PACKET_SHORT_WRITE
Line 637: Line 655:
|-
|-
| 0xC0F40508 || Inout || 244 || NVDCUTIL_DSI_PACKET_READ
| 0xC0F40508 || Inout || 244 || NVDCUTIL_DSI_PACKET_READ
|-
| 0x40010509 || In || 1 || [10.0.0+] NVDCUTIL_DP_ELEC_TEST_MODE_ENABLE
|-
| 0xC020050A || Inout || 32 || [10.0.0+] NVDCUTIL_DP_ELEC_TEST_SETTINGS
|}
|}


Line 677: Line 699:
| 0x4008060F || In || 8 || [[#NVSCHED_CTRL_DETACH_APPLICATION]]
| 0x4008060F || In || 8 || [[#NVSCHED_CTRL_DETACH_APPLICATION]]
|-
|-
| 0x40100610 || In || 16 || NVSCHED_CTRL_LINK_RUNLIST_EX
| 0x40100610 || In || 16 || NVSCHED_CTRL_SET_APPLICATION_MAX_DEBT
|-
|-
| 0x40100611 || In || 16 || NVSCHED_CTRL_UNLINK_RUNLIST_EX
| 0x40100611 || In || 16 || NVSCHED_CTRL_SET_RUNLIST_MAX_DEBT
|-
|-
| 0x40010612 || In || 1 || NVSCHED_CTRL_OVERRUN_EVENTS_ON_OFF
| 0x40010612 || In || 1 || NVSCHED_CTRL_OVERRUN_EVENTS_ENABLE
|}
|}


Line 877: Line 899:
| 0xC0084105 || Inout || 8 || [[#NVGPU_AS_IOCTL_UNMAP_BUFFER]]
| 0xC0084105 || Inout || 8 || [[#NVGPU_AS_IOCTL_UNMAP_BUFFER]]
|-
|-
| 0xC0284106 || Inout || 40 || [[#NVGPU_AS_IOCTL_MODIFY]]
| 0xC0284106 || Inout || 40 || [[#NVGPU_AS_IOCTL_MAP_BUFFER_EX]]
|-
|-
| 0x40104107 || In || 16 || [[#NVGPU_AS_IOCTL_INITIALIZE]]
| 0x40104107 || In || 16 || [[#NVGPU_AS_IOCTL_ALLOC_AS]]
|-
|-
| 0xC0404108 || Inout || 64 || [[#NVGPU_AS_IOCTL_GET_VA_REGIONS]]
| 0xC0404108 || Inout || 64 || [[#NVGPU_AS_IOCTL_GET_VA_REGIONS]]
|-
|-
| 0x40284109 || In || 40 || [[#NVGPU_AS_IOCTL_INITIALIZE_EX]]
| 0x40284109 || In || 40 || [[#NVGPU_AS_IOCTL_ALLOC_AS_EX]]
|-
|-
| 0xC038410A || Inout || 56 || [[#NVGPU_AS_IOCTL_MAP_BUFFER_EX]]
| 0xC038410A || Inout || 56 || [[#NVGPU_AS_IOCTL_MODIFY]]
|-
|-
| 0xC0??4114 || Inout || Variable || [[#NVGPU_AS_IOCTL_REMAP]]
| 0xC0??4114 || Inout || Variable || [[#NVGPU_AS_IOCTL_REMAP]]
Line 894: Line 916:


   struct {
   struct {
     __in u32 fd;
     __in u32 channel_fd;
   };
   };


Line 904: Line 926:
     __in u32 page_size;
     __in u32 page_size;
     __in u32 flags;
     __in u32 flags;
     u32      pad;
     u32      padding;
     union {
     union {
       __out u64 offset;
       __out u64 offset;
Line 927: Line 949:
   struct {
   struct {
     __in    u32 flags;        // bit0: fixed_offset, bit2: cacheable
     __in    u32 flags;        // bit0: fixed_offset, bit2: cacheable
     u32        pad;
     u32        reserved;
     __in    u32 nvmap_handle;
     __in    u32 dmabuf_fd;   // nvmap handle
     __inout u32 page_size;    // 0 means don't care
     __inout u32 page_size;    // 0 means don't care
     union {
     union {
Line 936: Line 958:
   };
   };


=== NVGPU_AS_IOCTL_MODIFY ===
=== NVGPU_AS_IOCTL_MAP_BUFFER_EX ===
Modifies a memory region in the device address space.
Maps a memory region in the device address space with extra params.


Unaligned size will cause a [[#Panic]].
Unaligned size will cause a [[#Panic]].
Line 946: Line 968:
     __in      u32 flags;          // bit0: fixed_offset, bit2: cacheable
     __in      u32 flags;          // bit0: fixed_offset, bit2: cacheable
     __in      u32 kind;          // -1 is default
     __in      u32 kind;          // -1 is default
     __in      u32 nvmap_handle;
     __in      u32 dmabuf_fd;     // nvmap handle
     __inout  u32 page_size;      // 0 means don't care
     __inout  u32 page_size;      // 0 means don't care
     __in      u64 buffer_offset;
     __in      u64 buffer_offset;
Line 960: Line 982:
   };
   };


=== NVGPU_AS_IOCTL_INITIALIZE ===
=== NVGPU_AS_IOCTL_ALLOC_AS ===
Nintendo's custom implementation of NVGPU_GPU_IOCTL_ALLOC_AS (unavailable).
Nintendo's custom implementation for allocating an address space.


   struct {
   struct {
     __in u32 big_page_size;  // depends on GPU's available_big_page_sizes; 0=default
     __in u32 big_page_size;  // depends on GPU's available_big_page_sizes; 0=default
     __in s32 as_fd;          // ignored; passes 0
     __in s32 as_fd;          // ignored; passes 0
     __in u32 flags;          // ignored; passes 0
     __in u64 reserved;        // ignored; passes 0
    __in u32 reserved;        // ignored; passes 0
   };
   };


Line 976: Line 997:
     u64 offset;
     u64 offset;
     u32 page_size;
     u32 page_size;
     u32 pad;
     u32 reserved;
     u64 pages;
     u64 pages;
   };
   };
    
    
   struct {
   struct {
     u64          not_used;   // (contained output user ptr on linux, ignored)
     u64          buf_addr;   // (contained output user ptr on linux, ignored)
     __inout u32  bufsize;    // forced to 2*sizeof(struct va_region)
     __inout u32  buf_size;    // forced to 2*sizeof(struct va_region)
     u32          pad;
     u32          reserved;
     __out struct  va_region regions[2];
     __out struct  va_region regions[2];
   };
   };


=== NVGPU_AS_IOCTL_INITIALIZE_EX ===
=== NVGPU_AS_IOCTL_ALLOC_AS_EX ===
Nintendo's custom implementation of NVGPU_GPU_IOCTL_ALLOC_AS (unavailable) with extra params.
Nintendo's custom implementation for allocating an address space with extra params.


   struct {
   struct {
Line 1,000: Line 1,021:
   };
   };


=== NVGPU_AS_IOCTL_MAP_BUFFER_EX ===
=== NVGPU_AS_IOCTL_MODIFY ===
Maps a memory region in the device address space with extra params.
Modifies a memory region in the device address space.


     struct {
     struct {
     __in      u32 flags;          // bit0: fixed_offset, bit2: cacheable
     __in      u32 flags;          // bit0: fixed_offset, bit2: cacheable
     __in      u32 kind;          // -1 is default
     __in      u32 kind;          // -1 is default
     __in      u32 nvmap_handle;
     __in      u32 dmabuf_fd;     // nvmap handle
     __inout  u32 page_size;      // 0 means don't care
     __inout  u32 page_size;      // 0 means don't care
     __in      u64 buffer_offset;
     __in      u64 buffer_offset;
Line 1,013: Line 1,034:
     __in      u64 unk0;
     __in      u64 unk0;
     __in      u32 unk1;
     __in      u32 unk1;
     u32           pad;
     u32           reserved;
   };
   };


Line 1,019: Line 1,040:
Nintendo's custom implementation of address space remapping.
Nintendo's custom implementation of address space remapping.


   struct remap_entry {
   struct remap_op {
     __in u16 flags;           // 0 or 4
     __in u16 flags;                   // 0 or 4
     __in u16 kind;           
     __in u16 kind;           
     __in u32 nvmap_handle;
     __in u32 mem_handle;
     __in u32 map_offset;
     __in u32 mem_offset_in_pages;
     __in u32 gpu_offset;       // (alloc_space_offset >> 0x10)
     __in u32 virt_offset_in_pages;   // (alloc_space_offset >> 0x10)
     __in u32 pages;           // alloc_space_pages
     __in u32 num_pages;               // alloc_space_pages
   };
   };
   
   
  struct {
  struct {
     __in struct remap_entry entries[];
     __in struct remap_op entries[];
  };
  };


Line 1,871: Line 1,892:


= nvmemp =
= nvmemp =
NVIDIA memory profiler (this service is not available on retail units).  
This is "nv::MemoryProfiler::IMemoryProfiler".
 
/dev/nvhost-ctrl sends the ioctl NVHOST_IOCTL_CTRL_GET_CONFIG to check the config "nv!NV_MEMORY_PROFILER". If config_str returns "1", the application attempts to use nvmemp.
/dev/nvhost-ctrl sends the ioctl NVHOST_IOCTL_CTRL_GET_CONFIG to check the config "nv!NV_MEMORY_PROFILER". If config_str returns "1", the application attempts to use nvmemp.


Line 1,880: Line 1,902:
| 0 || Open
| 0 || Open
|-
|-
| 1 || GetAruid
| 1 || GetPid
|}
|}


Line 1,919: Line 1,941:
| 0 || Initialize
| 0 || Initialize
|-
|-
| 1 || GetGemEvent
| 1 || GetEventHandle
|-
|-
| 2 ||  
| 2 || ControlNotification
|-
|-
| 3 || RegisterUnregisterAppIdLocked
| 3 || SetNotificationPerm
|-
|-
| 4 ||
| 4 || SetCoreDumpPerm
|-
|-
| [1.0.0-4.1.0] 5 || GetAruid
| 5 || [1.0.0-4.1.0] GetAruid
|-
|-
| 6 || HandleDeferredErrors
| 6 || Reset
|-
|-
| 7 || [3.0.0+]
| 7 || [3.0.0+]
Line 1,945: Line 1,967:
| 1 || GetAruid
| 1 || GetAruid
|-
|-
| [1.0.0-8.1.0] 2 || ReadNextCdBlock
| 2 || [1.0.0-8.1.0] ReadNextBlock
|-
|-
| 3 || [8.0.0+]
| 3 || [8.0.0+]
Line 1,951: Line 1,973:
| 4 || [8.0.0+]
| 4 || [8.0.0+]
|}
|}
= nvdbg:d =
This is "nns::nvdrv::INvDrvDebugSvcServices". This was added with [10.0.0+].
This service has no commands.


= Errors =
= Errors =
Line 1,957: Line 1,984:
{| class="wikitable" border="1"
{| class="wikitable" border="1"
|-
|-
! Cmd || Name
! Value || Name
|-
| 0x0 || NvError_Success
|-
| 0x1 || NvError_NotImplemented
|-
| 0x2 || NvError_NotSupported
|-
| 0x3 || NvError_NotInitialized
|-
| 0x4 || NvError_BadParameter
|-
| 0x5 || NvError_Timeout
|-
| 0x6 || NvError_InsufficientMemory
|-
| 0x7 || NvError_ReadOnlyAttribute
|-
| 0x8 || NvError_InvalidState
|-
| 0x9 || NvError_InvalidAddress
|-
| 0xA || NvError_InvalidSize
|-
| 0xB || NvError_BadValue
|-
| 0xD || NvError_AlreadyAllocated
|-
| 0xE || NvError_Busy
|-
| 0xF || NvError_ResourceError
|-
| 0x10 || NvError_CountMismatch
|-
| 0x11 || NvError_OverFlow
|-
| 0x1000 || NvError_InsufficientTransferMemory
|-
| 0x10000 || NvError_InsufficientVideoMemory
|-
| 0x10001 || NvError_BadSurfaceColorScheme
|-
| 0x10002 || NvError_InvalidSurface
|-
| 0x10003 || NvError_SurfaceNotSupported
|-
| 0x20000 || NvError_DispInitFailed
|-
| 0x20001 || NvError_DispAlreadyAttached
|-
| 0x20002 || NvError_DispTooManyDisplays
|-
| 0x20003 || NvError_DispNoDisplaysAttached
|-
| 0x20004 || NvError_DispModeNotSupported
|-
| 0x20005 || NvError_DispNotFound
|-
| 0x20006 || NvError_DispAttachDissallowed
|-
| 0x20007 || NvError_DispTypeNotSupported
|-
| 0x20008 || NvError_DispAuthenticationFailed
|-
|-
| 0 || Success
| 0x20009 || NvError_DispNotAttached
|-
|-
| 1 || NotImplemented
| 0x2000A || NvError_DispSamePwrState
|-
|-
| 2 || NotSupported
| 0x2000B || NvError_DispEdidFailure
|-
|-
| 3 || NotInitialized
| 0x2000C || NvError_DispDsiReadAckError
|-
|-
| 4 || BadParameter
| 0x2000D || NvError_DispDsiReadInvalidResp
|-
|-
| 5 || Timeout
| 0x30000 || NvError_FileWriteFailed
|-
|-
| 6 || InsufficientMemory
| 0x30001 || NvError_FileReadFailed
|-
|-
| 7 || ReadOnlyAttribute
| 0x30002 || NvError_EndOfFile
|-
|-
| 8 || InvalidState
| 0x30003 || NvError_FileOperationFailed
|-
|-
| 9 || InvalidAddress
| 0x30004 || NvError_DirOperationFailed
|-
|-
| 0xA || InvalidSize
| 0x30005 || NvError_EndOfDirList
|-
|-
| 0xB || BadValue
| 0x30006 || NvError_ConfigVarNotFound
|-
|-
| 0xD || AlreadyAllocated
| 0x30007 || NvError_InvalidConfigVar
|-
|-
| 0xE || Busy
| 0x30008 || NvError_LibraryNotFound
|-
|-
| 0xF || ResourceError
| 0x30009 || NvError_SymbolNotFound
|-
|-
| 0x10 || CountMismatch
| 0x3000A || NvError_MemoryMapFailed
|-
|-
| 0x1000 || SharedMemoryTooSmall
| 0x3000F || NvError_IoctlFailed                       
|-
|-
| 0x30003 || FileOperationFailed
| 0x30010 || NvError_AccessDenied
|-
|-
| 0x30004 || DirOperationFailed
| 0x30011 || NvError_DeviceNotFound
|-
|-
| 0x3000F || IoctlFailed                       
| 0x30012 || NvError_KernelDriverNotFound
|-
|-
| 0x30010 || AccessDenied
| 0x30013 || NvError_FileNotFound
|-
|-
| 0x30013 || FileNotFound
| 0x30014 || NvError_PathAlreadyExists
|-
|-
| 0xA000E || ModuleNotPresent
| 0xA000E || NvError_ModuleNotPresent
|}
|}


Retrieved from "https://switchbrew.org/wiki/NV_services"