Changes

395 bytes added ,  07:46, 10 September 2019
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Standard ARM cache clean code, uses LoUIS from CLIDR_EL1.
 
Standard ARM cache clean code, uses LoUIS from CLIDR_EL1.
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== KernelLdr_ExceptionTable ==
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Standard aarch64 exception table, only function that doesn't infinite loop is synchronous exception from same EL (synch_spx_exception)
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synch_spx_exception does the following:
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* Moves TPIDR_EL1 into X0
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* Infinite loops if it is 0/NULL.
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* Restores X19-X30 + SP from the memory pointed to by TPIDR_EL1.
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* Returns to the saved LR stored in the context save struct.
    
== KInitialPageAllocator::KInitialPageAllocator ==
 
== KInitialPageAllocator::KInitialPageAllocator ==