Fuses: Difference between revisions
No edit summary |
|||
(9 intermediate revisions by 2 users not shown) | |||
Line 133: | Line 133: | ||
|} | |} | ||
FUSE_FUSECTRL_CMD takes the fuse controller's operation mode. READ and WRITE interact directly with the hardware fuse bitmap while SENSE_CTRL flushes programmed values into the [[Fuses#Cache_registers|cache registers]]. | |||
SENSE_CTRL | |||
FUSE_FUSECTRL_STATE returns the current state of the fuse controller. | |||
FUSE_FUSECTRL_MARGIN_READ changes the fuse read trip point setting to margin read mode. | |||
FUSE_FUSECTRL_RWL selects the fuse redundancy information row. | |||
FUSE_FUSECTRL_PD_CTRL controls the fuse macro's power down mode. | |||
FUSE_FUSECTRL_FUSE_SENSE_DONE is set if fuse sensing is completed. | |||
FUSE_FUSECTRL_RECORD_SHIFT_DONE is set if ramrepair shift is completed. | |||
==== FUSE_FUSEADDR ==== | ==== FUSE_FUSEADDR ==== | ||
Line 184: | Line 195: | ||
|} | |} | ||
FUSE_FUSETIME_RD1_TSUR_MAX takes the maximum time for [[#FUSE_FUSECTRL|STATE_READ_SETUP]]. | |||
FUSE_FUSETIME_RD1_TSUR_FUSEOUT takes the time to spend on [[#FUSE_FUSECTRL|STATE_SAMPLE_FUSES]]. | |||
FUSE_FUSETIME_RD1_THR_MAX takes the maximum time for [[#FUSE_FUSECTRL|STATE_READ_HOLD]]. | |||
==== FUSE_FUSETIME_RD2 ==== | ==== FUSE_FUSETIME_RD2 ==== | ||
Line 195: | Line 210: | ||
|} | |} | ||
Takes the read strobe pulse width used during [[#FUSE_FUSECTRL|STATE_READ_STROBE]]. | |||
==== FUSE_FUSETIME_PGM1 ==== | ==== FUSE_FUSETIME_PGM1 ==== | ||
Line 215: | Line 230: | ||
|} | |} | ||
FUSE_FUSETIME_PGM1_TSUP_MAX takes the maximum time for [[#FUSE_FUSECTRL|STATE_WRITE_SETUP]]. | |||
FUSE_FUSETIME_PGM1_TSUP_ADDR takes the time to spend on [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_SETUP]]. | |||
FUSE_FUSETIME_PGM1_THP_ADDR takes the time to spend on [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_HOLD]]. | |||
FUSE_FUSETIME_PGM1_THP_PS takes the time to spend on [[#FUSE_FUSECTRL|STATE_FUSE_SRC_HOLD]]. | |||
==== FUSE_FUSETIME_PGM2 ==== | ==== FUSE_FUSETIME_PGM2 ==== | ||
Line 232: | Line 253: | ||
|} | |} | ||
FUSE_FUSETIME_PGM2_TWIDTH_PGM takes the program strobe pulse width used during [[#FUSE_FUSECTRL|STATE_WRITE_PROGRAM]]. | |||
FUSE_FUSETIME_PGM2_TSUP_PS takes the time to spend on [[#FUSE_FUSECTRL|STATE_FUSE_SRC_SETUP]]. | |||
FUSE_FUSETIME_PGM2_THP_CSPS takes the time to spend on [[#FUSE_FUSECTRL|STATE_READ_BEFORE_WRITE_SETUP]]. | |||
==== FUSE_PRIV2INTFC_START ==== | ==== FUSE_PRIV2INTFC_START ==== | ||
Line 389: | Line 414: | ||
|} | |} | ||
Takes the time to spend on [[#FUSE_FUSECTRL|STATE_READ_DEASSERT_PD]]. | |||
==== FUSE_PRIVATE_KEY0_NONZERO ==== | ==== FUSE_PRIVATE_KEY0_NONZERO ==== | ||
Line 790: | Line 815: | ||
| 0x7000FAF4 | | 0x7000FAF4 | ||
|- | |- | ||
| FUSE_ECO_RESERVE_0 | | [[#FUSE_ECO_RESERVE_0|FUSE_ECO_RESERVE_0]] | ||
| 0x7000FAF8 | | 0x7000FAF8 | ||
|- | |- | ||
| FUSE_RESERVED_CALIB0 | | FUSE_RESERVED_CALIB0 | ||
Line 1,013: | Line 1,035: | ||
|} | |} | ||
Stores software reserved configuration values. | |||
Original launch units have the RCM USB controller mode set to USB 2.0, while the first batch of patched units have the RCM USB controller mode set to XUSB. | Original launch units have the RCM USB controller mode set to USB 2.0, while the first batch of patched units have the RCM USB controller mode set to XUSB. | ||
Line 1,062: | Line 1,084: | ||
|- | |- | ||
| 11 | | 11 | ||
| [5.0.0+] Patch flag (0x00 = Unpatched, | | [5.0.0+] Patch flag (0x00 = Unpatched, 0x01 = Patched) | ||
|- | |- | ||
| 16-19 | | 16-19 | ||
Line 1,688: | Line 1,710: | ||
|- | |- | ||
| ramrepair_record0 | | ramrepair_record0 | ||
| | | 106 | ||
| None | | None | ||
| 0-31 | | 0-31 | ||
|- | |- | ||
| ramrepair_record1 | | ramrepair_record1 | ||
| | | 107 | ||
| None | | None | ||
| 0-31 | | 0-31 | ||
|- | |- | ||
| ramrepair_record2 | | ramrepair_record2 | ||
| | | 108 | ||
| None | | None | ||
| 0-31 | | 0-31 | ||
|- | |- | ||
| ramrepair_record3 | | ramrepair_record3 | ||
| | | 109 | ||
| None | | None | ||
| 0-31 | | 0-31 | ||
|- | |- | ||
| ramrepair_record4 | | ramrepair_record4 | ||
| | | 110 | ||
| None | | None | ||
| 0-31 | | 0-31 | ||
|- | |- | ||
| ramrepair_record5 | | ramrepair_record5 | ||
| | | 111 | ||
| None | | None | ||
| 0-31 | | 0-31 | ||
|- | |- | ||
| ramrepair_record6 | | ramrepair_record6 | ||
| | | 112 | ||
| None | | None | ||
| 0-31 | | 0-31 | ||
|- | |- | ||
| ramrepair_record7 | | ramrepair_record7 | ||
| 113 | | 113 | ||
| None | | None | ||
Line 1,739: | Line 1,756: | ||
=== reserved_odm6 === | === reserved_odm6 === | ||
Used for anti-downgrade control. | Used for [[#Anti-downgrade|anti-downgrade]] control. | ||
=== reserved_odm7 === | === reserved_odm7 === | ||
Used for anti-downgrade control. | Used for [[#Anti-downgrade|anti-downgrade]] control. | ||
=== irom_patch === | === irom_patch === | ||
Line 2,260: | Line 2,277: | ||
| 9.0.0-9.0.1 | | 9.0.0-9.0.1 | ||
| 11 | | 11 | ||
| 1 | |||
|- | |||
| 9.1.0 | |||
| 12 | |||
| 1 | | 1 | ||
|} | |} |