Changes

Jump to navigation Jump to search
883 bytes added ,  18:49, 12 December 2019
Line 133: Line 133:  
|}
 
|}
   −
Before fuse reading/writing the power down mode must be disabled.
+
FUSE_FUSECTRL_CMD takes the fuse controller's operation mode. READ and WRITE interact directly with the hardware fuse bitmap while SENSE_CTRL flushes programmed values into the [[Fuses#Cache_registers|cache registers]].
SENSE_CTRL mode flushes programmed values into the [[Fuses#Cache_registers|cache registers]].
+
 
 +
FUSE_FUSECTRL_STATE returns the current state of the fuse controller.
 +
 
 +
FUSE_FUSECTRL_MARGIN_READ changes the fuse read trip point setting to margin read mode.
 +
 
 +
FUSE_FUSECTRL_RWL selects the fuse redundancy information row.
 +
 
 +
FUSE_FUSECTRL_PD_CTRL controls the fuse macro's power down mode.
 +
 
 +
FUSE_FUSECTRL_FUSE_SENSE_DONE is set if fuse sensing is completed.
 +
 
 +
FUSE_FUSECTRL_RECORD_SHIFT_DONE is set if ramrepair shift is completed.
    
==== FUSE_FUSEADDR ====
 
==== FUSE_FUSEADDR ====
Line 184: Line 195:  
|}
 
|}
   −
Controls the [[#FUSE_FUSECTRL|STATE_READ_SETUP]] (TSUR_MAX), [[#FUSE_FUSECTRL|STATE_READ_STROBE]] (TSUR_FUSEOUT) and [[#FUSE_FUSECTRL|STATE_READ_HOLD]] (THR_MAX) times.
+
FUSE_FUSETIME_RD1_TSUR_MAX takes the maximum time for [[#FUSE_FUSECTRL|STATE_READ_SETUP]].
 +
 
 +
FUSE_FUSETIME_RD1_TSUR_FUSEOUT takes the time to spend on [[#FUSE_FUSECTRL|STATE_SAMPLE_FUSES]].
 +
 
 +
FUSE_FUSETIME_RD1_THR_MAX takes the maximum time for [[#FUSE_FUSECTRL|STATE_READ_HOLD]].
    
==== FUSE_FUSETIME_RD2 ====
 
==== FUSE_FUSETIME_RD2 ====
Line 195: Line 210:  
|}
 
|}
   −
Controls [[#FUSE_FUSECTRL|STATE_SAMPLE_FUSES]] (TWIDTH_RD) time.
+
Takes the read strobe pulse width used during [[#FUSE_FUSECTRL|STATE_READ_STROBE]].
    
==== FUSE_FUSETIME_PGM1 ====
 
==== FUSE_FUSETIME_PGM1 ====
Line 215: Line 230:  
|}
 
|}
   −
Controls the [[#FUSE_FUSECTRL|STATE_WRITE_SETUP]] (TSUP_MAX), [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_SETUP]] (TSUP_ADDR), [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_HOLD]] (THP_ADDR) and [[#FUSE_FUSECTRL|STATE_FUSE_SRC_HOLD]] (THP_PS) times.
+
FUSE_FUSETIME_PGM1_TSUP_MAX takes the maximum time for [[#FUSE_FUSECTRL|STATE_WRITE_SETUP]].
 +
 
 +
FUSE_FUSETIME_PGM1_TSUP_ADDR takes the time to spend on [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_SETUP]].
 +
 
 +
FUSE_FUSETIME_PGM1_THP_ADDR takes the time to spend on [[#FUSE_FUSECTRL|STATE_WRITE_ADDR_HOLD]].
 +
 
 +
FUSE_FUSETIME_PGM1_THP_PS takes the time to spend on [[#FUSE_FUSECTRL|STATE_FUSE_SRC_HOLD]].
    
==== FUSE_FUSETIME_PGM2 ====
 
==== FUSE_FUSETIME_PGM2 ====
Line 232: Line 253:  
|}
 
|}
   −
Controls the [[#FUSE_FUSECTRL|STATE_WRITE_PROGRAM]] (TWIDTH_PGM), [[#FUSE_FUSECTRL|STATE_FUSE_SRC_SETUP]] (TSUP_PS) and [[#FUSE_FUSECTRL|STATE_READ_BEFORE_WRITE_SETUP]] (THP_CSPS) times.
+
FUSE_FUSETIME_PGM2_TWIDTH_PGM takes the program strobe pulse width used during [[#FUSE_FUSECTRL|STATE_WRITE_PROGRAM]].
 +
 
 +
FUSE_FUSETIME_PGM2_TSUP_PS takes the time to spend on [[#FUSE_FUSECTRL|STATE_FUSE_SRC_SETUP]].
 +
 
 +
FUSE_FUSETIME_PGM2_THP_CSPS takes the time to spend on [[#FUSE_FUSECTRL|STATE_READ_BEFORE_WRITE_SETUP]].
    
==== FUSE_PRIV2INTFC_START ====
 
==== FUSE_PRIV2INTFC_START ====
Line 389: Line 414:  
|}
 
|}
   −
Controls the [[#FUSE_FUSECTRL|STATE_READ_DEASSERT_PD]] (TSUR_PDCS) time.
+
Takes the time to spend on [[#FUSE_FUSECTRL|STATE_READ_DEASSERT_PD]].
    
==== FUSE_PRIVATE_KEY0_NONZERO ====
 
==== FUSE_PRIVATE_KEY0_NONZERO ====
Line 790: Line 815:  
| 0x7000FAF4
 
| 0x7000FAF4
 
|-
 
|-
| FUSE_ECO_RESERVE_0
+
| [[#FUSE_ECO_RESERVE_0|FUSE_ECO_RESERVE_0]]
 
| 0x7000FAF8
 
| 0x7000FAF8
|-
  −
| FUSE_SPARE_REALIGNMENT_REG_OLD
  −
| 0x7000FAFC
   
|-
 
|-
 
| FUSE_RESERVED_CALIB0
 
| FUSE_RESERVED_CALIB0
Line 1,013: Line 1,035:  
|}
 
|}
   −
Caches the value of the reserved_sw fuse from the hardware bitmap.
+
Stores software reserved configuration values.
    
Original launch units have the RCM USB controller mode set to USB 2.0, while the first batch of patched units have the RCM USB controller mode set to XUSB.
 
Original launch units have the RCM USB controller mode set to USB 2.0, while the first batch of patched units have the RCM USB controller mode set to XUSB.
Line 1,062: Line 1,084:  
|-
 
|-
 
| 11
 
| 11
| [5.0.0+] Patch flag (0x00 = Unpatched, 1 = Patched)
+
| [5.0.0+] Patch flag (0x00 = Unpatched, 0x01 = Patched)
 
|-
 
|-
 
| 16-19
 
| 16-19
Line 1,688: Line 1,710:  
|-
 
|-
 
| ramrepair_record0
 
| ramrepair_record0
| 105
+
| 106
 
| None
 
| None
 
| 0-31
 
| 0-31
 
|-
 
|-
 
| ramrepair_record1
 
| ramrepair_record1
| 106
+
| 107
 
| None
 
| None
 
| 0-31
 
| 0-31
 
|-
 
|-
 
| ramrepair_record2
 
| ramrepair_record2
| 107
+
| 108
 
| None
 
| None
 
| 0-31
 
| 0-31
 
|-
 
|-
 
| ramrepair_record3
 
| ramrepair_record3
| 108
+
| 109
 
| None
 
| None
 
| 0-31
 
| 0-31
 
|-
 
|-
 
| ramrepair_record4
 
| ramrepair_record4
| 109
+
| 110
 
| None
 
| None
 
| 0-31
 
| 0-31
 
|-
 
|-
 
| ramrepair_record5
 
| ramrepair_record5
| 110
+
| 111
 
| None
 
| None
 
| 0-31
 
| 0-31
 
|-
 
|-
 
| ramrepair_record6
 
| ramrepair_record6
| 111
+
| 112
 
| None
 
| None
 
| 0-31
 
| 0-31
 
|-
 
|-
 
| ramrepair_record7
 
| ramrepair_record7
| 112
  −
| None
  −
| 0-31
  −
|-
  −
| ramrepair_record8
   
| 113
 
| 113
 
| None
 
| None
Line 1,739: Line 1,756:     
=== reserved_odm6 ===
 
=== reserved_odm6 ===
Used for anti-downgrade control.
+
Used for [[#Anti-downgrade|anti-downgrade]] control.
    
=== reserved_odm7 ===
 
=== reserved_odm7 ===
Used for anti-downgrade control.
+
Used for [[#Anti-downgrade|anti-downgrade]] control.
    
=== irom_patch ===
 
=== irom_patch ===
Line 2,260: Line 2,277:  
| 9.0.0-9.0.1
 
| 9.0.0-9.0.1
 
| 11
 
| 11
 +
| 1
 +
|-
 +
| 9.1.0
 +
| 12
 
| 1
 
| 1
 
|}
 
|}

Navigation menu