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63 bytes added ,  07:50, 10 September 2019
Line 69: Line 69:  
* TPIDR_EL1 is now set to 0, and VBAR_EL1 is now set to a table that infinite loops on all exceptions other than synchronous from same exception level.
 
* TPIDR_EL1 is now set to 0, and VBAR_EL1 is now set to a table that infinite loops on all exceptions other than synchronous from same exception level.
 
** synch_spx_el1 now restores a number of registers from a context with pointer in TPIDR_EL1.
 
** synch_spx_el1 now restores a number of registers from a context with pointer in TPIDR_EL1.
* TPIDR_EL1 is now set to a context save struct before manufacturer-specific system registers are set.
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* TPIDR_EL1 is now set to a context save struct before manufacturer-specific system registers are set, and validated to be non-0/NULL afterwards. It is then cleared.
 
** Support was added for Cortex-A53 specific CPU initialization.
 
** Support was added for Cortex-A53 specific CPU initialization.
 
* Kernel .rodata is now initially mapped as RW- instead of R--, and then reprotected to R-- after relocations are completed.
 
* Kernel .rodata is now initially mapped as RW- instead of R--, and then reprotected to R-- after relocations are completed.

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