Changes

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|-

| GMMU DMA attack

| GMMU DMA attack

| The Switch's GPU includes a separate MMU (GMMU) that is allowed to bypass the system's IOMMU (SMMU). By accessing the GPU's MMIO region and manipulating the page table entires in the GMMU, an attacker can read/write any portion of the DRAM (except memory carveouts).

| The Switch's GPU includes a separate MMU (GMMU) that is allowed to bypass the system's IOMMU (SMMU). By accessing the GPU's MMIO region and manipulating the page table entries in the GMMU, an attacker can read/write any portion of the DRAM (except memory carveouts).

| None

| None

| [[4.1.0]]

| [[4.1.0]]