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This patch sets APBDEV_PMC_SCRATCH190_0 to 0x01, which LP0 resume code expects.
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−
LP0 resume code expects APBDEV_PMC_SCRATCH190_0 to be set to 0x01, but the bootrom didn't set it.
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Line 2,938:
Line 2,936:
==== IROM patch 6 ====
==== IROM patch 6 ====
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This patch is a factory backdoor.
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This patch allows controlling the debug authentication configuration using a fuse.
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−
It allows controlling the debug authentication configuration using a fuse.
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Line 2,961:
Line 2,957:
==== IROM patch 7 ====
==== IROM patch 7 ====
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This patch is a bugfix.
+
This patch prevents overflowing IRAM (0x40010000) when copying the warmboot binary from DRAM.
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It prevents overflowing IRAM (0x40010000) when copying the warmboot binary from DRAM.
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Line 2,993:
Line 2,987:
==== IROM patch 8 ====
==== IROM patch 8 ====
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This patch is a bugfix.
+
This patch sets the correct warmboot binary entrypoint address for RSA signature verification, which would be done in DRAM instead of IRAM without this patch.
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−
It sets the correct warmboot binary entrypoint address for RSA signature verification, which would be done in DRAM instead of IRAM without this patch.