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QueryEvent is only supported on (and implemented differently on):
QueryEvent is only supported on (and implemented differently on):
* /dev/nvhost-gpu
* /dev/nvhost-gpu
** 1: SmException_BptIntReport
** EvtId=1: SmException_BptIntReport
** 2: SmException_BptPauseReport
** EvtId=2: SmException_BptPauseReport
** 3: ErrorNotifierEvent
** EvtId=3: ErrorNotifierEvent
* /dev/nvhost-ctrl: Used to get events for SyncPts.
* /dev/nvhost-ctrl: Used to get events for syncpts.
** If bit31-28 is 1, then lower 16-bits contain event_id, bit27-16 contain syncpt_id.
** EvtId=(event_slot | ((syncpt_id & 0xFFF) << 16) | (is_valid << 28)): New format used by NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT/NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX.
** If bit31-28 is 0, then lower 4-bits contain event_id, bit31-4 contains syncpt_id.
** EvtId=(event_slot | (syncpt_id << 4)): Old format used by NVHOST_IOCTL_CTRL_SYNCPT_WAITEX.
* /dev/nvhost-ctrl-gpu
* /dev/nvhost-ctrl-gpu
** 1: Returns error_event_handle.
** EvtId=1: Returns error_event_handle.
** 2: Returns unknown event.
** EvtId=2: Returns unknown event.
* /dev/nvhost-dbg-gpu
* /dev/nvhost-dbg-gpu
** Ignores event_id.
** Ignores EvtId.
== MapSharedMem ==
== MapSharedMem ==
| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]
| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]
|-
|-
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_SINGLE]]
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX]]
|-
|-
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_ALLOC_EVENT]]
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_ALLOC_EVENT]]
| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENT_BATCH]]
| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENT_BATCH]]
|-
|-
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL]]
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_GET_SHIFT]]
|}
|}
struct {
struct {
__in u32 id;
__in u32 id;
__in u32 lock; // (0==unlock; 1==lock)
__in u32 lock; // 0=unlock, 1=lock
};
};
struct {
struct {
__in u32 event_id; // 0x00 to 0x3F
__in u32 event_slot; // 0x00 to 0x3F
};
};
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT ===
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT ===
Waits on a syncpt using events. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (((('''id''' & 0xFFF) << 0x10) | 0x10000000) | '''event_id''').
Waits on a syncpt using events. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to ('''event_slot''' | (('''syncpt_id''' & 0xFFF) << 16) | ('''is_valid''' << 28)).
struct {
struct {
};
};
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_SINGLE ===
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX ===
Waits on a syncpt using a specific event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (('''id''' * 0x10) | '''event_id''').
Waits on a syncpt using a specific event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to ('''event_slot''' | ('''syncpt_id''' << 4)).
struct {
struct {
__in u32 thresh;
__in u32 thresh;
__in s32 timeout;
__in s32 timeout;
__inout u32 value; // in=event_id; out=syncpt_value
__inout u32 value; // in=event_slot; out=syncpt_value
};
};
struct {
struct {
__in u32 event_id; // 0x00 to 0x3F
__in u32 event_slot; // 0x00 to 0x3F
};
};
struct {
struct {
__in u32 event_id; // 0x00 to 0x3F
__in u32 event_slot; // 0x00 to 0x3F
};
};
struct {
struct {
__in u64 event_id_mask; // 64-bit bitfield where each bit represents one event
__in u64 event_slot_mask; // 64-bit bitfield where each bit represents one event
};
};
=== NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL ===
=== NVHOST_IOCTL_CTRL_SYNCPT_GET_SHIFT ===
Returns the syncpt shift value.
struct {
struct {
__out u32 max_channel; // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
__out u32 syncpt_shift; // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
};
};
| 0xC018441A || Inout || 24 || NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA
| 0xC018441A || Inout || 24 || NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA
|-
|-
| 0xC020441B || Inout || 32 || [11.0.0+]
| 0xC020441B || Inout || 32 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA_EX
|-
|-
| 0xC084441C || Inout || 132 || [11.0.0+]
| 0xC084441C || Inout || 132 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_SETTINGS
|-
|-
| 0xC018441D || Inout || 24 || [11.0.0+]
| 0xC018441D || Inout || 24 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_SERIAL_NUMBER
|-
|-
| 0xC020441E || Inout || 32 || [11.0.0+]
| 0xC020441E || Inout || 32 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_GPU_VA_RANGE_PAGES
|}
|}