Secure Monitor: Difference between revisions
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| 2 || [[#DramId]] | | 2 || [[#DramId]] | ||
|- | |- | ||
| 3 || [[# | | 3 || [[#SecurityEngineInterruptNumber]] | ||
|- | |- | ||
| 4 || [[# | | 4 || [[#FuseVersion]] | ||
|- | |- | ||
| 5 || [[#HardwareType]] | | 5 || [[#HardwareType]] | ||
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| 13 || [[#IsChargerHiZModeEnabled]] | | 13 || [[#IsChargerHiZModeEnabled]] | ||
|- | |- | ||
| 14 || [4.0.0+] [[# | | 14 || [4.0.0+] [[#IsQuest]] | ||
|- | |- | ||
| 15 || [5.0.0+] [[#RegulatorType]] | | 15 || [5.0.0+] [[#RegulatorType]] | ||
|- | |- | ||
| 16 || [5.0.0+] [[# | | 16 || [5.0.0+] [[#DeviceUniqueKeyGeneration]] | ||
|- | |- | ||
| 17 || [5.0.0+] [[#Package2Hash]] | | 17 || [5.0.0+] [[#Package2Hash]] | ||
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'''Erista''' memory is LPDDR4, while '''Mariko''' memory is LPDDR4X. | '''Erista''' memory is LPDDR4, while '''Mariko''' memory is LPDDR4X. | ||
===== | ===== SecurityEngineInterruptNumber ===== | ||
SPL uses this for setting up the security engine IRQ. | SPL uses this for setting up the security engine IRQ. | ||
===== | ===== FuseVersion ===== | ||
The current [[Package2#Versions|Package1 Maxver Constant]] - 1. | The current [[Package2#Versions|Package1 Maxver Constant]] - 1. | ||
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This tells if the TI Charger (bq24192) is active. | This tells if the TI Charger (bq24192) is active. | ||
===== | ===== IsQuest ===== | ||
This item is bit 10 from [[Fuse_registers#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]]. | This item is bit 10 from [[Fuse_registers#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]]. | ||
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[5.0.0+] [[PCV_services|PCV]] uses this value in combination with [[#HardwareType|HardwareType]] to configure power blocks and memory tables for different hardware. | [5.0.0+] [[PCV_services|PCV]] uses this value in combination with [[#HardwareType|HardwareType]] to configure power blocks and memory tables for different hardware. | ||
===== | ===== DeviceUniqueKeyGeneration ===== | ||
This item is obtained from [[Fuse_registers#FUSE_RESERVED_ODM2|FUSE_RESERVED_ODM2]] if bit 11 from [[Fuse_registers#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]] is set, [[Fuse_registers#FUSE_RESERVED_ODM0|FUSE_RESERVED_ODM0]] matches 0x8E61ECAE and [[Fuse_registers#FUSE_RESERVED_ODM1|FUSE_RESERVED_ODM1]] matches 0xF2BA3BB2. | This item is obtained from [[Fuse_registers#FUSE_RESERVED_ODM2|FUSE_RESERVED_ODM2]] if bit 11 from [[Fuse_registers#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]] is set, [[Fuse_registers#FUSE_RESERVED_ODM0|FUSE_RESERVED_ODM0]] matches 0x8E61ECAE and [[Fuse_registers#FUSE_RESERVED_ODM1|FUSE_RESERVED_ODM1]] matches 0xF2BA3BB2. | ||