Difference between revisions of "NV services"
| Line 5: | Line 5: | ||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
|- | |- | ||
| − | ! Cmd || Name | + | ! Cmd || Name |
|- | |- | ||
| − | | 0 || Open | + | | 0 || Open |
|- | |- | ||
| − | | 1 || [[#Ioctl]] | + | | 1 || [[#Ioctl]] |
|- | |- | ||
| − | | 2 || Close | + | | 2 || Close |
|- | |- | ||
| − | | 3 || Initialize | + | | 3 || Initialize |
|- | |- | ||
| − | | 4 || QueryEvent | + | | 4 || QueryEvent |
|- | |- | ||
| − | | 5 || MapSharedMem | + | | 5 || MapSharedMem |
|- | |- | ||
| − | | 6 | + | | 6 || |
|- | |- | ||
| − | | 7 | + | | 7 || |
|- | |- | ||
| − | | 8 || Audio render related init? | + | | 8 || Audio render related init? |
|- | |- | ||
| − | | 9 || ? | + | | 9 || ? |
| − | |||
|} | |} | ||
| Line 32: | Line 31: | ||
Just like any standard build of the NVIDIA graphics' drivers, the nvdrv:a service operates mainly by processing requests and sending them to the kernel (not verified) through IOCtl commands. | Just like any standard build of the NVIDIA graphics' drivers, the nvdrv:a service operates mainly by processing requests and sending them to the kernel (not verified) through IOCtl commands. | ||
Note that these commands are generated with the following primitive (see Linux kernel): | Note that these commands are generated with the following primitive (see Linux kernel): | ||
| − | |||
| + | #define _IOC(inout, group, num, len) \ | ||
| + | (inout | ((len & IOCPARM_MASK) << 16) | ((group) << 8) | (num)) | ||
The following table contains valid commands for group 0x00. | The following table contains valid commands for group 0x00. | ||
Revision as of 20:59, 15 April 2017
The Switch makes use of a customized NVIDIA driver that is exposed through multiple services. Communication with these services goes through IPC, as usual.
nvdrv:a
| Cmd | Name |
|---|---|
| 0 | Open |
| 1 | #Ioctl |
| 2 | Close |
| 3 | Initialize |
| 4 | QueryEvent |
| 5 | MapSharedMem |
| 6 | |
| 7 | |
| 8 | Audio render related init? |
| 9 | ? |
Ioctl
Just like any standard build of the NVIDIA graphics' drivers, the nvdrv:a service operates mainly by processing requests and sending them to the kernel (not verified) through IOCtl commands. Note that these commands are generated with the following primitive (see Linux kernel):
#define _IOC(inout, group, num, len) \ (inout | ((len & IOCPARM_MASK) << 16) | ((group) << 8) | (num))
The following table contains valid commands for group 0x00. This group consists in commands for the "/dev/nvhost-ctrl" interface and a few global commands for every nvhost channel (e.g.: "/dev/nvhost-gpu").
| Value | Description | Notes |
|---|---|---|
| 0xC0??0001 | NVHOST32_IOCTL_CHANNEL_SUBMIT | ?? == size is unknown |
| 0xC0080002 | NVHOST_IOCTL_CHANNEL_GET_SYNCPOINT | |
| 0xC0080003 | NVHOST_IOCTL_CHANNEL_GET_WAITBASE | |
| 0xC0080004 | NVHOST_IOCTL_CHANNEL_SET_TIMEOUT_EX | |
| 0xC01C0009 | NVHOST_IOCTL_CHANNEL_SUBMIT(?) | |
| 0xC01C000A | NVHOST_IOCTL_CHANNEL_MODULE_REGRDWR(?) | |
| 0xC0080014 | NVHOST_IOCTL_CTRL_SYNCPT_READ | |
| 0x40040015 | NVHOST_IOCTL_CTRL_SYNCPT_INCR | |
| 0xC00C0016 | NVHOST_IOCTL_CTRL_SYNCPT_WAIT | |
| 0x40080017 | NVHOST_IOCTL_CTRL_MODULE_MUTEX | |
| 0xC0180018 | NVHOST32_IOCTL_CTRL_MODULE_REGRDWR | |
| 0xC0100019 | NVHOST_IOCTL_CTRL_SYNCPT_WAITEX | |
| 0xC008001A | NVHOST_IOCTL_CTRL_SYNCPT_READ_MAX | |
| 0xC004001C | NVHOST_IOCTL_CTRL_GET_VERSION(?) | |
| 0xC010001D | Unknown | NvRmSyncWaitEvent (wait on event? |
| 0xC010001E | Unknown | NvRmSyncWaitEvent (wait on event?) |
| 0xC004001F | Unknown | NvRmSyncWaitEvent (signal event?) |
| 0xC0040020 | Unknown | NvRmSyncWaitEvent (signal event?) |
| 0x40080021 | Unknown | Returns busy? |
The following table contains valid commands for group 0x01.
This group consists in commands for the "/dev/nvmap" interface.
| Value | Description | Notes |
|---|---|---|
| 0xC0080101 | NVMAP_IOC_CREATE | |
| 0xC0080103 | NVMAP_IOC_FROM_ID | |
| 0xC0200104 | NVMAP_IOC_ALLOC | |
| 0xC0180105 | NVMAP_IOC_FREE | |
| 0xC00C0109 | NVMAP_IOC_PARAM | |
| 0xC008010E | NVMAP_IOC_GET_ID |
The following table contains valid commands for group 0x41 ('A').
This group consists in commands for the "/dev/nvhost-as-gpu" interface.
| Value | Description | Notes |
|---|---|---|
| 0x40044101 | NVGPU_AS_IOCTL_BIND_CHANNEL | |
| 0xC0184102 | NVGPU32_AS_IOCTL_ALLOC_SPACE | |
| 0xC0104103 | NVGPU_AS_IOCTL_FREE_SPACE | |
| 0xC0184104 | NVGPU_AS_IOCTL_MAP_BUFFER | |
| 0xC0084105 | NVGPU_AS_IOCTL_UNMAP_BUFFER | |
| 0xC0284106 | NVGPU_AS_IOCTL_ALLOC_SPACE | |
| 0x40104107 | Unknown | |
| 0xC0404108 | Unknown | |
| 0x40284109 | Unknown | |
| 0xC0144114 | Unknown |
The following table contains valid commands for group 0x44 ('D').
This group consists in commands for the "/dev/nvhost-dbg-gpu" interface.
| Value | Description | Notes |
|---|---|---|
| 0xC0??4402 | NVGPU_DBG_GPU_IOCTL_REG_OPS | ?? == size is unknown |
The following table contains valid commands for group 0x47 ('G').
This group consists in commands for the "/dev/nvhost-ctrl-gpu" interface.
| Value | Description | Notes |
|---|---|---|
| 0x80044701 | NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE | |
| 0x80284702 | NVGPU_GPU_IOCTL_ZCULL_GET_INFO | |
| 0x402C4703 | NVGPU_GPU_IOCTL_ZBC_SET_TABLE | |
| 0xC0344704 | NVGPU_GPU_IOCTL_ZBC_QUERY_TABLE | |
| 0xC0B04705 | NVGPU_GPU_IOCTL_GET_CHARACTERISTICS | |
| 0xC0184706 | NVGPU_AS_IOCTL_ALLOC_SPACE | |
| 0x40084707 | Unknown | |
| 0x4008470E | Unknown | |
| 0x4010470F | Unknown | |
| 0xC0084710 | Unknown | |
| 0x80084711 | Unknown | |
| 0x80084714 | Unknown | |
| 0xC008471B | Unknown | |
| 0xC010471C | Unknown |
The following table contains valid commands for group 0x48 ('H').
This group consists in commands common to all nvhost channels (depending if they implement them or not), but they are only listed here in relation to the interface "/dev/nvhost-gpu" for convenience.
| Value | Description | Notes |
|---|---|---|
| 0x40044801 | NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD | |
| 0x40044803 | NVGPU_IOCTL_CHANNEL_SET_TIMEOUT(?) | |
| 0x40084805 | NVGPU_IOCTL_CHANNEL_SET_TIMEOUT_EX(?) | |
| 0xC0044807 | NVGPU_IOCTL_CHANNEL_CYCLE_STATS | |
| 0xC0184808 | NVGPU_IOCTL_CHANNEL_SUBMIT_GPFIFO | |
| 0xC0104809 | NVGPU_IOCTL_CHANNEL_ALLOC_OBJ_CTX | |
| 0x4008480A | NVGPU_IOCTL_CHANNEL_FREE_OBJ_CTX | |
| 0xC010480B | NVGPU_IOCTL_CHANNEL_ZCULL_BIND | |
| 0xC018480C | NVGPU_IOCTL_CHANNEL_SET_ERROR_NOTIFIER | |
| 0x4004480D | NVGPU_IOCTL_CHANNEL_OPEN | |
| 0x0000480E | NVGPU_IOCTL_CHANNEL_ENABLE | |
| 0x0000480F | NVGPU_IOCTL_CHANNEL_DISABLE | |
| 0x00004810 | NVGPU_IOCTL_CHANNEL_PREEMPT | |
| 0x00004811 | NVGPU_IOCTL_CHANNEL_FORCE_RESET | |
| 0x40084812 | NVGPU_IOCTL_CHANNEL_EVENTS_CTRL | |
| 0xC0104813 | NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT | |
| 0x80804816 | Unknown | |
| 0xC0104817 | Unknown | |
| 0x40204818 | Unknown | |
| 0xC0184819 | Unknown | |
| 0xC020481A | Unknown |