Difference between revisions of "HIPC"
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Line 7: | Line 7: | ||
| 0 || 15-0 || IPC version? Always 4. | | 0 || 15-0 || IPC version? Always 4. | ||
|- | |- | ||
− | | 0 || 19-16 || Number of | + | | 0 || 19-16 || Number of buf X descriptors (each: 2 words). Type mask: 9 |
|- | |- | ||
− | | 0 || 23-20 || Number of buf descriptors (each: 3 words). Type mask: 5 | + | | 0 || 23-20 || Number of buf A descriptors (each: 3 words). Type mask: 5 |
|- | |- | ||
− | | 0 || 27-24 || Number of | + | | 0 || 27-24 || Number of buf B descriptors (each: 3 words). Type mask: 6 |
|- | |- | ||
| 0 || 31-28 || Number of marshalls type W (each: 3 words) | | 0 || 31-28 || Number of marshalls type W (each: 3 words) | ||
Line 17: | Line 17: | ||
| 1 || 9-0 || Size of data portion in u32's. | | 1 || 9-0 || Size of data portion in u32's. | ||
|- | |- | ||
− | | 1 || 13-10 || | + | | 1 || 13-10 || If set to 2, enable buf C descriptor. Type mask: 0xA. |
|- | |- | ||
| 1 || 31 || Enable special descriptor. | | 1 || 31 || Enable special descriptor. | ||
Line 25: | Line 25: | ||
| ... || || Type X descriptors, each one 2 words. | | ... || || Type X descriptors, each one 2 words. | ||
|- | |- | ||
− | | ... || || Buf descriptors, each one 3 words. | + | | ... || || Buf A descriptors, each one 3 words. |
|- | |- | ||
− | | ... || || | + | | ... || || Buf B descriptors, each one 3 words. |
|- | |- | ||
| ... || || Type W descriptors, each one 3 words. | | ... || || Type W descriptors, each one 3 words. | ||
Line 49: | Line 49: | ||
|} | |} | ||
− | === | + | === Buffer descriptor A/B === |
− | + | This packing is so unnecessarily complex. | |
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
Line 68: | Line 68: | ||
|} | |} | ||
− | === | + | === Buffer descriptor C === |
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
− | ! Word || Description | + | ! Word || Bits || Description |
|- | |- | ||
− | | 0 || Lower 32-bits of | + | | 0 || || Lower 32-bits of address. |
|- | |- | ||
− | | 1 || | + | | 1 || 15-0 || Rest of address. |
+ | |- | ||
+ | | 1 || 31-16 || Size | ||
|} | |} | ||
− | === | + | === Buffer descriptor X === |
+ | This one is packed even worse than A, they inserted the bit38-36 of the address ''on top'' of the counter field. | ||
+ | |||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
− | ! Word || Description | + | ! Word || Bits || Description |
|- | |- | ||
− | | 0 || | + | | 0 || 5-0 || Bits 5-0 of counter. |
|- | |- | ||
− | | 1 || | + | | 0 || 8-6 || Bit 38-36 of address. |
+ | |- | ||
+ | | 0 || 11-9 || Bits 11-9 of counter. | ||
+ | |- | ||
+ | | 0 || 15-12 || Bit 35-32 of address. | ||
+ | |- | ||
+ | | 0 || 31-16 || Size | ||
+ | |- | ||
+ | | 1 || || Lower 32-bits of address. | ||
|} | |} | ||
Revision as of 02:02, 14 April 2017
Marshall Portion
This is an array of u32's.
Word | Bits | Description |
---|---|---|
0 | 15-0 | IPC version? Always 4. |
0 | 19-16 | Number of buf X descriptors (each: 2 words). Type mask: 9 |
0 | 23-20 | Number of buf A descriptors (each: 3 words). Type mask: 5 |
0 | 27-24 | Number of buf B descriptors (each: 3 words). Type mask: 6 |
0 | 31-28 | Number of marshalls type W (each: 3 words) |
1 | 9-0 | Size of data portion in u32's. |
1 | 13-10 | If set to 2, enable buf C descriptor. Type mask: 0xA. |
1 | 31 | Enable special descriptor. |
... | Special descriptor, if enabled. | |
... | Type X descriptors, each one 2 words. | |
... | Buf A descriptors, each one 3 words. | |
... | Buf B descriptors, each one 3 words. | |
... | Type W descriptors, each one 3 words. |
Special descriptor
There can only be one of this descriptor type. It is enabled by bit31 of the second word.
Word | Bits | Description |
---|---|---|
0 | 0 | ? |
0 | 4-1 | Number of A-words for this special descriptor. |
0 | 8-5 | Number of B-words for this special descriptor. |
... | A-words, purpose unknown. | |
... | B-words, purpose unknown. |
Buffer descriptor A/B
This packing is so unnecessarily complex.
Word | Bits | Description |
---|---|---|
0 | Lower 32-bits of size. | |
1 | Lower 32-bits of address. | |
2 | 0 | Always set to 1 or 3. R/RW. |
2 | 4-2 | Bit 38-36 of address. |
2 | 27-24 | Bit 35-32 of size. |
2 | 31-28 | Bit 35-32 of address. |
Buffer descriptor C
Word | Bits | Description |
---|---|---|
0 | Lower 32-bits of address. | |
1 | 15-0 | Rest of address. |
1 | 31-16 | Size |
Buffer descriptor X
This one is packed even worse than A, they inserted the bit38-36 of the address on top of the counter field.
Word | Bits | Description |
---|---|---|
0 | 5-0 | Bits 5-0 of counter. |
0 | 8-6 | Bit 38-36 of address. |
0 | 11-9 | Bits 11-9 of counter. |
0 | 15-12 | Bit 35-32 of address. |
0 | 31-16 | Size |
1 | Lower 32-bits of address. |
Data Portion
This is an array of u64's placed after the marshall header. But it's always aligned to 16 so sometimes there is padding words inserted inbetween.
Word | Description |
---|---|
0 | Magic ("SFCI") |
1 | Cmd id |
... | Non-marshalled data is placed here |
Cmd header
Cmd header 1 | Cmd header 2 | Description |
---|---|---|
4 | 9 | Data portion size 20. |
4 | 10 | Data portion size 24. |
4 | 12 | Data portion size 32. |
4 | 14 | Data portion size 40. |
4 | 0x8000000C | Marshall words: (u32) 1. Data portion size 32. |