TSEC: Difference between revisions
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| Line 703: | Line 703: | ||
| 0x04 | | 0x04 | ||
|- | |- | ||
| | | TSEC_TFBIF_DEBUG_STAT | ||
| 0x54501630 | | 0x54501630 | ||
| 0x04 | | 0x04 | ||
| Line 719: | Line 719: | ||
| 0x04 | | 0x04 | ||
|- | |- | ||
| [[# | | [[#TSEC_TFBIF_MMU_PHYS_TRANSCFG|TSEC_TFBIF_MMU_PHYS_TRANSCFG]] | ||
| 0x54501648 | | 0x54501648 | ||
| 0x04 | | 0x04 | ||
|- | |- | ||
| | | TSEC_TFBIF_ACTMON_MAMASK | ||
| 0x5450164C | | 0x5450164C | ||
| 0x04 | | 0x04 | ||
|- | |- | ||
| | | TSEC_TFBIF_ACTMON_BORPS | ||
| 0x54501650 | | 0x54501650 | ||
| 0x04 | | 0x04 | ||
|- | |- | ||
| | | TSEC_TFBIF_ACTMON_CTL | ||
| 0x54501654 | | 0x54501654 | ||
| 0x04 | | 0x04 | ||
| Line 2,279: | Line 2,279: | ||
[6.0.0+] The nvhost_tsec firmware sets this register to 0x10 or 0x111110 before reading memory from the GPU UCODE carveout. | [6.0.0+] The nvhost_tsec firmware sets this register to 0x10 or 0x111110 before reading memory from the GPU UCODE carveout. | ||
=== | === TSEC_TFBIF_MMU_PHYS_TRANSCFG === | ||
{| class="wikitable" border="1" | |||
! Bits | |||
! Description | |||
|- | |||
| 0-3 | |||
| Transfer configuration for CTXDMA port 0 | |||
|- | |||
| 4-7 | |||
| Transfer configuration for CTXDMA port 1 | |||
|- | |||
| 8-11 | |||
| Transfer configuration for CTXDMA port 2 | |||
|- | |||
| 12-15 | |||
| Transfer configuration for CTXDMA port 3 | |||
|- | |||
| 16-19 | |||
| Transfer configuration for CTXDMA port 4 | |||
|- | |||
| 20-23 | |||
| Transfer configuration for CTXDMA port 5 | |||
|- | |||
| 24-27 | |||
| Transfer configuration for CTXDMA port 6 | |||
|- | |||
| 28-31 | |||
| Transfer configuration for CTXDMA port 7 | |||
|} | |||
Controls the transfer configuration for MMU physical mode. | |||
[6.0.0+] The nvhost_tsec firmware sets this register to 0x20 or 0x140 before reading memory from the GPU UCODE carveout. | [6.0.0+] The nvhost_tsec firmware sets this register to 0x20 or 0x140 before reading memory from the GPU UCODE carveout. | ||