Difference between revisions of "GPU Classes"
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(→3D) |
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{| class=wikitable | {| class=wikitable | ||
! Register || Name || Notes | ! Register || Name || Notes | ||
| + | |- | ||
| + | | 0x1D1 || PauseTransform || | ||
|- | |- | ||
| 0x6C0 || PauseTransformFeedbackAddrHi || | | 0x6C0 || PauseTransformFeedbackAddrHi || | ||
Revision as of 01:47, 18 March 2018
Subchannels:
| Id | Subchannel (nvn) | Name |
|---|---|---|
| 0xB197 | 0 | 3D |
| 0xB1C0 | 1 | Compute |
| 0xA140 | 2 | Inline-to-Memory |
| 0x902D | 3 | 2D |
| 0xB0B5 | 4 | DMA |
3D
| Register | Name | Notes |
|---|---|---|
| 0x1D1 | PauseTransform | |
| 0x6C0 | PauseTransformFeedbackAddrHi | |
| 0x6C1 | PauseTransformFeedbackAddrLo | |
| 0x6C2 | ? | 0 is written here during transform pause. |
| 0x6C3 | PauseTransformFeedbackControl | Writing here accesses 4 bytes at PauseTransformFeedbackAddr. Seen values: 0x1D005002 + {0,1,2,3}*0x20 |
DMA
| Register | Name | Notes |
|---|---|---|
| 0x0C0 | DmaControl | With 0x186 Src/DstStride is not used. |
| 0x100 | DmaSrcAddrHi | |
| 0x101 | DmaSrcAddrLo | |
| 0x102 | DmaDstAddrHi | |
| 0x103 | DmaDstAddrLo | |
| 0x104 | DmaSrcStride? | |
| 0x105 | DmaDstStride? | |
| 0x106 | DmaCount | At most 0x3FFFFF. |