Difference between revisions of "GPU Classes"

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(Created page with "Subchannels: {| class=wikitable ! Id || Subchannel (nvn) || Name |- | 0xB197 || 0 || 3D |- | 0xB1C0 || 1 || Compute |- | 0xA140 || 2 || Inline-to-Memory |- | 0x902D || 3 || 2D...")
 
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! Register || Name || Notes
 
! Register || Name || Notes
 
|-
 
|-
| 0x0C0 || DmaControl || Seen 0x186.
+
| 0x0C0 || DmaControl || With 0x186 Src/DstStride is not used.
 
|-
 
|-
 
| 0x100 || DmaSrcAddrHi ||
 
| 0x100 || DmaSrcAddrHi ||
Line 28: Line 28:
 
| 0x103 || DmaDstAddrLo ||
 
| 0x103 || DmaDstAddrLo ||
 
|-
 
|-
| 0x106 || DmaLength || At most 0x3FFFFF.
+
| 0x104 || DmaSrcStride? ||
 +
|-
 +
| 0x105 || DmaDstStride? ||
 +
|-
 +
| 0x106 || DmaCount || At most 0x3FFFFF.
 
|}
 
|}

Revision as of 01:36, 18 March 2018

Subchannels:

Id Subchannel (nvn) Name
0xB197 0 3D
0xB1C0 1 Compute
0xA140 2 Inline-to-Memory
0x902D 3 2D
0xB0B5 4 DMA

DMA

Register Name Notes
0x0C0 DmaControl With 0x186 Src/DstStride is not used.
0x100 DmaSrcAddrHi
0x101 DmaSrcAddrLo
0x102 DmaDstAddrHi
0x103 DmaDstAddrLo
0x104 DmaSrcStride?
0x105 DmaDstStride?
0x106 DmaCount At most 0x3FFFFF.