NPDM: Difference between revisions
→ACID: ARMS has this set to 0x3 in its NPDM |
Consistency fixes |
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| Line 40: | Line 40: | ||
|- | |- | ||
| 0xC | | 0xC | ||
| | | 0x1 | ||
| Flags, bit0: 64-bit instructions, bits1-3: address space width (1=64-bit, 2=32-bit). Needs to be <= 0xF | | Flags, bit0: 64-bit instructions, bits1-3: address space width (1=64-bit, 2=32-bit). Needs to be <= 0xF | ||
|- | |- | ||
| 0xE | | 0xE | ||
| | | 0x1 | ||
| MainThreadPrio | | MainThreadPrio | ||
|- | |- | ||
| 0xF | | 0xF | ||
| | | 0x1 | ||
| DefaultCpuId | | DefaultCpuId | ||
|- | |- | ||
| Line 56: | Line 56: | ||
|- | |- | ||
| 0x18 | | 0x18 | ||
| | | 0x4 | ||
| ProcessCategory (0: regular title, 1: kernel built-in). Should be 0 here. | | ProcessCategory (0: regular title, 1: kernel built-in). Should be 0 here. | ||
|- | |- | ||
| 0x1C | | 0x1C | ||
| | | 0x4 | ||
| MainStackSize | | MainStackSize | ||
|- | |- | ||
| Line 91: | Line 91: | ||
! Description | ! Description | ||
|- | |- | ||
| | | 0x0 | ||
| 0x100 | | 0x100 | ||
| RSA-2048 signature, seems to verify the data starting at 0x100 with the size field from 0x204. | | RSA-2048 signature, seems to verify the data starting at 0x100 with the size field from 0x204. | ||
| Line 140: | Line 140: | ||
|- | |- | ||
| 0x230 | | 0x230 | ||
| | | 0x4 | ||
| [[#Kernel Access Control]] offset | | [[#Kernel Access Control]] offset | ||
|- | |- | ||
| 0x234 | | 0x234 | ||
| | | 0x4 | ||
| [[#Kernel Access Control]] size | | [[#Kernel Access Control]] size | ||
|- | |- | ||
| Line 192: | Line 192: | ||
|- | |- | ||
| 0x30 | | 0x30 | ||
| | | 0x4 | ||
| [[#Kernel Access Control]] offset | | [[#Kernel Access Control]] offset | ||
|- | |- | ||
| 0x34 | | 0x34 | ||
| | | 0x4 | ||
| [[#Kernel Access Control]] size | | [[#Kernel Access Control]] size | ||
|- | |- | ||