Difference between revisions of "GPU Classes"

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(Add info from source code found in linux drivers)
Line 22: Line 22:
 
| 0x40 || NoOperation || 1 || ||
 
| 0x40 || NoOperation || 1 || ||
 
|-
 
|-
−
| 0x41 || SetNotify || 2 || gpuva ||
+
| 0x41 || SetNotifyA || 1 || gpuva ||
 
|-
 
|-
−
| 0x43 || NotifyType || 1 || || 0=WriteOnly, 1=WriteThenAwaken
+
| 0x42 || SetNotifyB || 1 || gpuva ||
 +
|-
 +
| 0x43 || Notify || 1 || || 0=WriteOnly, 1=WriteThenAwaken
 
|-
 
|-
 
| 0x44 || WaitForIdle || 1 || ||
 
| 0x44 || WaitForIdle || 1 || ||
 
|-
 
|-
−
| 0x45 || MmeInstructionRamPointer || 1 || uint ||
+
| 0x45 || LoadMmeInstructionRamPointer || 1 || uint ||
 
|-
 
|-
−
| 0x46 || MmeInstructionRamLoad || 1 || pipe || Writes to and increments MmeInstructionRamPointer by 1.
+
| 0x46 || LoadMmeInstructionRam || 1 || pipe || Writes to and increments MmeInstructionRamPointer by 1.
 
|-
 
|-
−
| 0x47 || MmeStartAddressRamPointer || 1 || uint ||
+
| 0x47 || LoadMmeStartAddressRamPointer || 1 || uint ||
 
|-
 
|-
−
| 0x48 || MmeStartAddressRamLoad || 1 || pipe ||
+
| 0x48 || LoadMmeStartAddressRam || 1 || pipe ||
 
|-
 
|-
−
| 0x49 || MmeShadowRamControl || 1 || uint || 0=MethodTrack, 1=MethodTrackWithFilter, 2=MethodPassthrough, 3=MethodReplay. Used during ClearColor.
+
| 0x49 || SetMmeShadowRamControl || 1 || uint || 0=MethodTrack, 1=MethodTrackWithFilter, 2=MethodPassthrough, 3=MethodReplay. Used during ClearColor.
 
|- style="border-top: double"
 
|- style="border-top: double"
 
| 0x83 || LineWidthSeparate || 1 || bool ||
 
| 0x83 || LineWidthSeparate || 1 || bool ||
Line 446: Line 448:
 
| 0x904+8*N || ConstBufferNBind || 1 || bitfield || n=0..4. Bit0: Valid, bit4-8: Index
 
| 0x904+8*N || ConstBufferNBind || 1 || bitfield || n=0..4. Bit0: Valid, bit4-8: Index
 
|- style="border-top: double"
 
|- style="border-top: double"
−
| 0xD00 || MmeShadowScratch || uint[0x80] || 128 || Mostly general purpose, sometimes accessed by FirmwareCall.
+
| 0xD00 || SetMmeShadowScratch || uint[0x80] || 128 || Mostly general purpose, sometimes accessed by FirmwareCall.
 
|- style="border-top: double"
 
|- style="border-top: double"
−
| 0xE00+N*2 || MmeMacroNCall || 1 || uint || n=0..0x7f. Writing here calls a bound macro with value written put in r1.
+
| 0xE00+N*2 || CallMmeMacroN || 1 || uint || n=0..0x7f. Writing here calls a bound macro with value written put in r1.
 
|-
 
|-
−
| 0xE01+N*2 || MmeMacroNData || 1 || pipe || Used to send variable number of arguments to macro via the "parm" instruction.
+
| 0xE01+N*2 || CallMmeDataN || 1 || pipe || Used to send variable number of arguments to macro via the "parm" instruction.
 
|}
 
|}
  
Line 459: Line 461:
 
! Register || Name || Size || Type || Notes
 
! Register || Name || Size || Type || Notes
 
|-
 
|-
−
| 0x0C0 || Control || 1 || bitfield || With 0x186 Src/DstStride is not used. With 0x586 memset-functionality is used.
+
| 0x090 || SetSemaphoreA || 1 || ||
 +
|-
 +
| 0x091 || SetSemaphoreB || 1 || ||
 +
|-
 +
| 0x092 || SetSemaphorePayload || 1 || ||
 +
|-
 +
| 0x095 || SetRenderEnableA || 1 || ||
 +
|-
 +
| 0x096 || SetRenderEnableB || 1 || ||
 +
|-
 +
| 0x097 || SetRenderEnableC || 1 || ||
 +
|-
 +
| 0x098 || SetSrcPhysMode || 1 || ||
 +
|-
 +
| 0x099 || SetDstPhysMode || 1 || ||
 +
|-
 +
| 0x0C0 || LaunchDma || 1 || bitfield || With 0x186 Src/DstStride is not used. With 0x586 memset-functionality is used.
 +
|-
 +
| 0x100 || OffsetInUpper || 1 || gpuva ||
 +
|-
 +
| 0x101 || OffsetInLower || 1 || gpuva ||
 +
|-
 +
| 0x102 || OffsetOutUpper || 1 || gpuva ||
 +
|-
 +
| 0x103 || OffsetOutLower || 1 || gpuva ||
 
|-
 
|-
−
| 0x100 || SourceAddr || 2 || gpuva ||
+
| 0x104 || PitchIn || 1 || uint ||
 
|-
 
|-
−
| 0x102 || DestinationAddr || 2 || gpuva ||
+
| 0x105 || PitchOut || 1 || uint ||
 
|-
 
|-
−
| 0x104 || SourceStride? || 1 || uint ||
+
| 0x106 || LineLengthIn || 1 || uint || At most 0x3FFFFF.
 
|-
 
|-
−
| 0x105 || DestinationStride? || 1 || uint ||
+
| 0x106 || LineCount || 1 || uint || At most 0x3FFFFF.
 
|-
 
|-
−
| 0x106 || Count || 1 || uint || At most 0x3FFFFF.
+
| 0x1C0 || SetRemapConstA || 1 || uint ||
 
|-
 
|-
−
| 0x1C0 || MemsetValue? || 1 || uint ||
+
| 0x1C1 || SetRemapConstB || 1 || uint ||
 
|-
 
|-
−
| 0x1C2 || MemsetControl? || 1 || bitfield || Seen: 0x34444
+
| 0x1C2 || SetRemapComponents || 1 || bitfield || Seen: 0x34444
 
|-
 
|-
−
| 0x1C4 || MemsetLength? || 1 || uint || In units of 4 bytes.
+
| 0x1C4 || ? || 1 || uint || In units of 4 bytes.
 
|-
 
|-
 
| 0x1C5 || ? || 1 || || Seen: 1
 
| 0x1C5 || ? || 1 || || Seen: 1
 
|}
 
|}

Revision as of 19:21, 23 January 2020

Subchannels:

Id Subchannel (nvn) Name
0xB197 0 3D
0xB1C0 1 Compute
0xA140 2 Inline-to-Memory
0x902D 3 2D
0xB0B5 4 DMA

3D

Register Name Size Type Notes
0 SetObject 1 bitfield Bit0-15: ClassId, bit16-20: EngineId
0x40 NoOperation 1
0x41 SetNotifyA 1 gpuva
0x42 SetNotifyB 1 gpuva
0x43 Notify 1 0=WriteOnly, 1=WriteThenAwaken
0x44 WaitForIdle 1
0x45 LoadMmeInstructionRamPointer 1 uint
0x46 LoadMmeInstructionRam 1 pipe Writes to and increments MmeInstructionRamPointer by 1.
0x47 LoadMmeStartAddressRamPointer 1 uint
0x48 LoadMmeStartAddressRam 1 pipe
0x49 SetMmeShadowRamControl 1 uint 0=MethodTrack, 1=MethodTrackWithFilter, 2=MethodPassthrough, 3=MethodReplay. Used during ClearColor.
0x83 LineWidthSeparate 1 bool
0x84 ForceEarlyFragmentTests 1 bool
0x87 Barrier 1 bitfield
0xBA 1 SetRenderTargets writes 1/0 here an optional buffer != NULL, and depending on type.
0xBE 1 pipe SetRenderTargets writes here repeatedly 16 times, if an optional buffer != NULL and is a given type.
0xBF 1 bool SetRenderTargets writes 1 here after 0xBE has been written 16 times, and 0xDC been written.
0xC2 CacheSplit 1 enum
0xC8 TesselationMode 1 bitfield Bit0-1: PrimitiveType (0=Isolines, 1=Triangles, 2=Quads), bit4-5: Spacing (0=Equal, 1=FractionalOdd, 2=FractionalEven), bit8-9: WindingAndConnectednessFlags (0=CcwAndNotConnected, 1=IsolineConnected, 1=TriangleCw, 2=TriangleConnected, 3=TriangleConnectedCw)
0xC9 TesselationOuterLevels 4 float[4]
0xCD TesselationInnerLevels 2 float[2]
0xDC 1 bool SetRenderTargets writes 1 here, if an optional buffer != NULL and is a given type.
0xDF RasterizerEnable 1 bool
0xE0+8*N TransformFeedbackBufferEnable 1 bool n=0..3
0xE1+8*N TransformFeedbackBufferAddr 2 gpuva
0xE3+8*N TransformFeedbackBufferFlags 1
0x1C0+4*N TransformFeedbackBufferStream 1 bitfield
0x1C1+4*N TransformFeedbackVaryingCount 1 uint
0x1C2+4*N TransformFeedbackStride 1 uint
0x1D1 TransformFeedbackEnable 1 bool
0x1D3 1 GpuInit writes 0x3f here.
0x1D5 SampleShading 1 bitfield Bit0-3: ?, bit4: Enable
0x1DF LocalBase 1 uint TODO
0x1F0 ZCullWidth 1 SetRenderTargets optionally uses this.
0x1F1 ZCullHeight 1 SetRenderTargets optionally uses this.
0x1F2 1 SetRenderTargets optionally uses this.
0x1F3 1 SetRenderTargets optionally writes 0 here.
0x1F8 1 SetRenderTargets optionally uses this.
0x1F9 1 SetRenderTargets optionally uses this.
0x1FA ZCullContextStartAddr 2 gpuva
0x1FC ZCullContextEndAddr 2 gpuva
0x200+16*N RenderTargetNAddr 2 gpuva
0x202+16*N RenderTargetNHorizontal 1
0x203+16*N RenderTargetNVertical 1
0x204+16*N RenderTargetNFormat 1
0x205+16*N RenderTargetNTileMode 1 bitfield Bit0-3: Width, bit4-7: Height, bit8-10: Depth, bit12: Layout, bit16: ?
0x206+16*N RenderTargetNArrayMode 1 bitfield Bit0-15: Layers, bit16: Volume
0x207+16*N RenderTargetNLayerStride 1 uint In units of 4 bytes.
0x208+16*N RenderTargetNBaseLayer 1
0x280+8*N ViewportNScaleX 1 float n=0..15
0x281+8*N ViewportNScaleY 1 float
0x282+8*N ViewportNScaleZ 1 float
0x283+8*N ViewportNTranslateX 1 float
0x284+8*N ViewportNTranslateY 1 float
0x285+8*N ViewportNTranslateZ 1 float
0x286+8*N ViewportNSwizzles 1 bitfield
0x287+8*N ViewportNSubpixelPrecisionBias 1 bitfield Bit0-4: BiasX, bit8-bit11: BiasY
0x300+4*N ViewportNHorizontal 1 bitfield Bit0-15: X, bit16-31: Width
0x301+4*N ViewportNVertical 1 bitfield Bit0-15: Y, bit16-31: Height
0x302+4*N ViewportNDepthRangeNear 1 float
0x303+4*N ViewportNDepthRangeFar 1 float
0x340+2*N ClipRectNHorizontal 1 n=0..7, TODO
0x341+2*N ClipRectNVertical 1 TODO
0x359 CallLimit 1 uint 0=FullLimit, 1...8=?, 15=Unlimited
0x35A CounterEnable 1 bitfield Bit0: ?, bit1: ?, ... bit15: ?
0x35D VertexBufferFirst 1
0x35E VertexBufferCount 1
0x35F DepthClipAllowNegativeZ 1 bool
0x360 ClearColor 4 float
0x364 ClearDepth 1 float
0x368 ClearStencil 1
0x36B PolygonModeFront 1 bitfield 0x1B00/0x1B01/0x1B02
0x36C PolygonModeBack 1 bitfield 0x1B00/0x1B01/0x1B02
0x36D PolygonSmoothEnable 1 bool
0x36F ? 1 bitfield Bit0:?, bit16:?. Used by ClearDepthStencil.
0x370 PolygonOffsetPointEnable 1 bool
0x371 PolygonOffsetLineEnable 1 bool
0x372 PolygonOffsetFillEnable 1 bool
0x373 PatchSize 1 Small value, always fits in 12 bits. In number of vertices.
0x374 1 0 written here for "simple" BlendState.
0x379 WatchdogTimer 1
0x37A PrimitiveRestartWithDrayArrays 1 boolean
0x37E WindowOffsetX 1 int
0x37F WindowOffsetY 1 int
0x380+4*N ScissorNEnable 1 bool n=0..15. GpuInit writes 1 here.
0x381+4*N ScissorNHorizontal 1 bitfield Bit0-15: min, bit16-31: max
0x382+4*N ScissorNVertical 1 bitfield Bit0-15: min, bit16-31: max
0x3D5 StencilBackRefValue 1
0x3D6 StencilBackEnable 1 bool
0x3D7 StencilBackValueMask 1
0x3D8 TiledCacheAction0 1 bool Trigger?
0x3D9 TiledCacheTileSize 1 bitfield Bit0-15: ?, bit16-31: ?
0x3DE DiscardTrigger 1 bitfield Bit4-6: DiscardColorIndex, bit0: DiscardDepthStencil
0x3E0 TiledCacheAction1 1 bool Trigger?
0x3E7 DepthBounds 2 float[2]
0x3ED MultisampleRasterEnable 1 bool Also written 0 when clearing all colors.
0x3EE MultisampleRasterSamples 1 bitfield 2=Four, 4=Eight, 5=?, 6=Sixteen
0x3EF MultisampleCoverageModulationMode 1
0x3F0 SampleMask0 1
0x3F1 SampleMask1 1
0x3F2 SampleMask2 1
0x3F5 Multisample_Related2 1 TODO
0x3F6 CoverageModulationEnable 1 bool
0x3F8 Unknown?Addr 2 gpuva SetRenderTargets writes the address of an optional buffer here.
0x3FA Unknown?TileMode 1 SetRenderTargets writes here optionally.
0x3FB Unknown?ArrayMode 1 SetRenderTargets writes here optionally.
0x3FC Unknown?BaseLayer 1 SetRenderTargets writes here optionally.
0x3FD 1 bitfield?[2] SetRenderTargets writes here
0x40C CoverageModulationTable 4 float[4]
0x433 1 GpuInit writes 4 here.
0x438 1 GpuInit writes 0xFF here.
0x439 1 GpuInit writes 0xFF here.
0x43B 1 GpuInit writes 0xFF here.
0x43C 1 GpuInit writes 4 here.
0x43D Unbind (???) 1 bitfield Bit0: InvalidateTextureHeaders, bit4: InvalidateTextureSamplers, bit8: InvalidateConstBuffers
0x43E ClearFlags? 1 GpuInit writes 0x101 here.
0x446 DrawElementsEnableBaseVertex? 1 bool TODO
0x44D TiledCacheAction2 1 bool Trigger?
0x452 RasterEnable 1 bool
0x458 VertexStreamNAttrib 4 bitfield[16] Bit0-4: StreamIndex, bit7-20: Format0, bit21-30: Format1
0x478 MultisampleGrid 3 bitfield[3] Bit0-3: x0, bit4-7: y0, bit8-11: x1, etc..
0x47C 1 trigger BindProgram writes 0 here sometimes.
0x47E MultisampleCoverageToColor 1 bitfield Bit0: Enable, bit4-6: ?
0x47F DepthBufferResolve 1 trigger 1 is written here to trigger.
0x487 RenderTargetControl 1 bitfield Bit0-3: NumberOfRenderTargets, bunch of other flags. Used by SetRenderTargets.
0x48A 1 Optionally used by SetRenderTargets.
0x48B 1 Optionally used by SetRenderTargets.
0x48C 1 Optionally used by SetRenderTargets.
0x48D SamplerBinding (???) 1 enum 0=Independently, 1=ViaHeaderBinding
0x4A2 InvalidateTextureDataNoWfi (???) 1 bitfield bit0: 0=AllLines, 1=OneLine, bit4-25: Tag
0x4AB ShaderScheduling (???) 1 enum 0=OldestThreadFirst, 1=RoundRobin
0x4B3 DepthTestEnable 1 bool Enables DepthWriteEnable and DepthFunc.
0x4B8 MultisampleAlphaToCoverageDither 1 bool
0x4B9 BlendIndependent 1 bool 1 written here for "simple" BlendState.
0x4BA DepthWriteEnable 1 bool
0x4BB AlphaTestEnable 1 bool
0x4C3 DepthFunc 1 bitfield Bit0-3: DepthFunc
0x4C4 AlphaTestRefValue 1 float
0x4C5 AlphaTestFunc 1 bitfield Bit0-3: AlphaTestFunc
0x4C7 BlendColor 4 float[4] TODO
0x4CC InvalidateSamplerCache (???) 1 bitfield bit0: 0=AllLines, 1=OneLine, bit4-25: Tag
0x4CD InvalidateTextureHeaderCache (???) 1 bitfield bit0: 0=AllLines, 1=OneLine, bit4-25: Tag
0x4CE InvalidateTextureDataCache (???) 1 bitfield bit0: 0=AllLines, 1=OneLine, bit4-25: Tag
0x4E0 StencilEnable 1 bool
0x4E5 StencilFrontRefValue 1
0x4E6 StencilFrontMaskValue 1
0x4E7 StencilFrontEnable 1 bool
0x4EC LineWidthSmooth 1 float
0x4ED LineWidthAliased 1 float
0x50D VertexBufferElementBase 1 uint
0x519 ZCullContextSave 1 trigger 0 is written here to trigger ctx-save, uses ZCullContextStartAddr.
0x51F PolygonOffsetClamp0 1 float
0x540 ZCullContextRestore 1 trigger 0 is written here to trigger ctx-restore, uses ZCullContextStartAddr.
0x546 PointSize 1 float
0x54C CounterReset 1 Value written decides which counter to reset.
0x54D MultisampleEnable 1
0x54E 1 bool SetRenderTargets writes 0 here if an optional buffer is NULL.
0x54F MultisampleControl 1 bool bit0: AlphaToCoverageEnable, bit1+: ?
0x554 RenderEnableOffset 2 gpuva
0x556 RenderEnableMode 1 enum 0=False, 1=True, 2=Conditional, 3=RenderIfEqual, 4=RenderIfNotEqual,
0x557 TexSamplerPoolOffset (???) 2 gpuva
0x558 TexSamplerPoolMaximumIndex (???) 1 bitfield Bit0-19: Maximum
0x55B PolygonOffsetFactor 1 float
0x55D TexHeaderPoolOffset (???) 2 gpuva
0x55F TexHeaderPoolMaximumIndex (???) 1 bitfield Bit0-21: Maximum
0x56D CsaaEnable 1 bool
0x56F PolygonOffsetOffset 1 float Float multiplied by 2 is written here.
0x574 MultisampleMode 1 Written by SetRenderTargets, possible values: 0, 2, 4, 5, 6.
0x57F 1 SetRenderTargets optionally writes 0 here.
0x580 1 SetRenderTargets optionally writes 0 here.
0x582 ProgramRegion (???) 2 gpuva
0x591 PrimitiveRestartEnable 1 bool
0x592 PrimitiveRestartIndex 1 uint
0x599 CubeMapInterFaceFiltering (???) 1 bitfield Bit0-1: Mode (0=UseWrap, 1=OverrideWrap, 2=AutoSpanSeam, 3=AutoCrossSeam)
0x5A4 ShaderControl (???) 1 bitfield Bit0: Partial (0=Zero, 1=Infinity), bit1: Fp32NanBehavior (0=Legacy, 1=Fp64Compatible), bit2: Fp32F21NanBehavior (0=PassZero, 1=PassIndefinite), bit16: ZeroTimesAnythingIsZero
0x5A5 BindConstantBuffer (???) 1 bitfield Bit0: Valid, bit8-12: ShaderSlot
0x5A6 InvalidateShaderCachesNoWfi (???) 1 bitfield Bit0: Instruction, bit4: GlobalData, bit8: Uniform, bit12: Constant
0x5F2 DrawElementsIndirectAddr 2 gpuva TODO
0x5F6 DrawElementsIndirectFlag? 1 bool TODO
0x620+N VertexStreamNEnableDivisor 1 bool n=0...15.
0x646 PolygonCullFaceEnable 1 bool
0x647 PolygonFrontFace 1 bitfield Bit0: Enable. Always ORR'd with 0x9000.
0x648 PolygonCullFaceConfig 1 bitfield TODO: 0x404/0x405/0x408
0x651 RenderEnableOverride 1 bitfield Bit0-1: 0=UseRenderEnable, 1=AlwaysRender, 2=NeverRender
0x64C InvalidateConstantBufferCache (???) 1 bitfield Bit0: ThruL2
0x64F DepthClamp 1 TODO: 0x101A is written when enabled, 0x181D when disabled.
0x66F DepthBoundsEnable 1 bool
0x671 ColorLogicOpEnable 1 bool Used for all LogicOps except 3.
0x672 ColorLogicOpType 1 bitfield Bit0-7: LogicOp, bit8-15: unknown, always 0x15.
0x689 SetSpare (???) 1 uint[4]
0x68B PipeNop 1 trigger Always 0 is written here. During zcull ctx-save, spammed when enabling raster, ...
0x6C0 ReportSemaphoreOffset 2 gpuva
0x6C2 ReportSemaphorePayload 1 0 is written here during most queries.
0x6C3 ReportSemaphoreControl 1 bitfield Bit0-1: Operation (0=Release, 3=Trap), bit2: FlushDisable, bit20: AwakenEnable, bit28: StructureSize (0=FourWords, 1=OneWord)
0x700+4*N VertexStreamNStride 1 uint Bit0-11: Stride. TODO: This has more stuff according to nouveau. n=0..31
0x701+4*N VertexBufferStartAddr 2 gpuva TODO: Incorrecto
0x703+4*N VertexStreamNDivisor
0x7C0+2*N VertexBufferEndAddr 2 gpuva
0x781+8*N BlendNRgbEquation 1 bitfield Bit0-2: BlendEquation.
0x782+8*N BlendNRgbFunctionSrc 1 bitfield Bit0-4: ?, bit14-15: ?
0x783+8*N BlendNRgbFunctionDst 1 bitfield Bit0-4: ?, bit14-15: ?
0x784+8*N BlendNAlphaEquation 1 bitfield Bit0-2: BlendEquation
0x785+8*N BlendNAlphaFunctionSrc 1 bitfield Bit0-4: ?, bit14-15: ?
0x786+8*N BlendNAlphaFunctionDst 1 bitfield Bit0-4: ?, bit14-15: ?
0x820 1 Select tessellation control program.
0x821 1 Specify tessellation control program entry point.
0x830 1 Select tessellation evaluation program.
0x840 1 Select geometry program.
0x850 1 Select fragment program.
0x8C0+N FirmwareCallN 8 uint Invokes GPU microcode firmware blob.
0x8E0 ConstantBufferSelectorSize 1 uint Bit0-16: Size
0x8E1 ConstantBufferSelectorAddr 2 gpuva
0x8E3 LoadConstantBufferOffset 1 uint Bit0-15: Offset. BindImage writes "8*i + 0x120" here. BindSeparateSampler writes "8*i + 0x568" here. BindSeparateTexture uses "8*i + 0x168". BindTexture uses 8*i + 32. TODO: BindStorageBuffer, UpdateUniformBuffer, etc
0x8E4 LoadConstantBuffer 1 uint[16]
0x904+8*N ConstBufferNBind 1 bitfield n=0..4. Bit0: Valid, bit4-8: Index
0xD00 SetMmeShadowScratch uint[0x80] 128 Mostly general purpose, sometimes accessed by FirmwareCall.
0xE00+N*2 CallMmeMacroN 1 uint n=0..0x7f. Writing here calls a bound macro with value written put in r1.
0xE01+N*2 CallMmeDataN 1 pipe Used to send variable number of arguments to macro via the "parm" instruction.

TODO: (Tiled)Downsample, Copy*, Dispatch*, DrawTexture/DrawTransformFeedback, BindImages, BindProgram, BindSeprarateSamplers, BindSeprarateTextures, BindTextures.

DMA

Register Name Size Type Notes
0x090 SetSemaphoreA 1
0x091 SetSemaphoreB 1
0x092 SetSemaphorePayload 1
0x095 SetRenderEnableA 1
0x096 SetRenderEnableB 1
0x097 SetRenderEnableC 1
0x098 SetSrcPhysMode 1
0x099 SetDstPhysMode 1
0x0C0 LaunchDma 1 bitfield With 0x186 Src/DstStride is not used. With 0x586 memset-functionality is used.
0x100 OffsetInUpper 1 gpuva
0x101 OffsetInLower 1 gpuva
0x102 OffsetOutUpper 1 gpuva
0x103 OffsetOutLower 1 gpuva
0x104 PitchIn 1 uint
0x105 PitchOut 1 uint
0x106 LineLengthIn 1 uint At most 0x3FFFFF.
0x106 LineCount 1 uint At most 0x3FFFFF.
0x1C0 SetRemapConstA 1 uint
0x1C1 SetRemapConstB 1 uint
0x1C2 SetRemapComponents 1 bitfield Seen: 0x34444
0x1C4 ? 1 uint In units of 4 bytes.
0x1C5 ? 1 Seen: 1
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