Kernel Loader: Difference between revisions
| Line 248: | Line 248: | ||
// Check what CPU we're running on to configure CPUECTLR, CPUACTLR appropriately. | // Check what CPU we're running on to configure CPUECTLR, CPUACTLR appropriately. | ||
manufacture_id = MIDR_EL1; | manufacture_id = MIDR_EL1; | ||
implementer = manufacturer_id >> 24) & 0xFF; | |||
// 9.0.0+: Save X19-X30 + SP, save context struct in TPIDR_EL1. | |||
KernelLdr_SaveRegistersToTpidr(); | |||
if (implementer == 0x41) { | if (implementer == 0x41) { | ||
// Implementer ID is 0x41 (ARM Limited). | // Implementer ID is 0x41 (ARM Limited). | ||
| Line 261: | Line 265: | ||
// If supported, disable load-pass DMB. | // If supported, disable load-pass DMB. | ||
cpuactlr_value |= 0x800000000000000; | cpuactlr_value |= 0x800000000000000; | ||
} | |||
CPUACTLR_EL1 = cpuactlr_value; | |||
if (CPUECTLR_EL1 != cpuectlr_value) { | |||
CPUECTLR_EL1 = cpuectlr_value; | |||
} | |||
} else if (architecture == 0xD03) { // 9.0.0+ | |||
// Architecture is 0xD03 (Cortex-A53). | |||
cpuactlr_value = 0x90CA000; // TODO: What is this? | |||
cpuectlr_value = 0x40; // TODO: What is this? | |||
if (hw_variant != 0 || (hw_variant == 0 && hw_revision > 2)) { | |||
// TODO: What is this? | |||
cpuactlr_value |= 0x100000000000; | |||
} | } | ||
CPUACTLR_EL1 = cpuactlr_value; | CPUACTLR_EL1 = cpuactlr_value; | ||
| Line 268: | Line 284: | ||
} | } | ||
} | } | ||
// 9.0.0+: Verify that TPIDR_EL1 is still set. | |||
KernelLdr_VerifyTpidrEl1(); | |||
</pre> | </pre> | ||