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27 bytes removed ,  07:46, 10 September 2019
Line 68: Line 68:     
* TPIDR_EL1 is now set to 0, and VBAR_EL1 is now set to a table that infinite loops on all exceptions other than synchronous from same exception level.
 
* TPIDR_EL1 is now set to 0, and VBAR_EL1 is now set to a table that infinite loops on all exceptions other than synchronous from same exception level.
** synch_spx_el1 now restores a number of registers from a context with pointer in TPIDR_EL1, and then clears TPIDR_EL1.
+
** synch_spx_el1 now restores a number of registers from a context with pointer in TPIDR_EL1.
 
* TPIDR_EL1 is now set to a context save struct before manufacturer-specific system registers are set.
 
* TPIDR_EL1 is now set to a context save struct before manufacturer-specific system registers are set.
 
** Support was added for Cortex-A53 specific CPU initialization.
 
** Support was added for Cortex-A53 specific CPU initialization.

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