Difference between revisions of "Panic codes"
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Revision as of 22:34, 8 January 2018
All elements in the Switch's boot chain up to the kernel have the ability to issue a system panic.
Panics are handled by writing a panic code in the PMC_SCRATCH200 register and requesting a reboot by programming a dedicated hardware watchdog (WDT4). The bootloaders and the Secure Monitor are able to do this right away, but the kernel must invoke the Panic SMC.
When the system reboots, the encrypted bootloader checks if the reset was requested by the watchdog (PMC_RST_STATUS register is set to 0x01) and parses the panic code stored in PMC_SCRATCH200.
If a panic did occur, the Switch will paint the main screen with a solid color and halt execution.
Structure
| Bits | Field |
|---|---|
| 31-28 | Red value |
| 27-24 | Green value |
| 23-20 | Blue value |
| 19-0 | Description |
The red, green and blue values are nibbles which represent the color that will fill the panic screen. Each nibble is duplicated to form a full byte before writing the final color to the display's MMIO.
Panic colors
| Color | Value | Domain |
|---|---|---|
| 0xFF0000 | Kernel | |
| 0xFFFF00 | Secure Monitor | |
| 0xFFAA00 | Hardware? | |
| 0xFF00AA | Bootloader (general errors) | |
| 0xAAFFFF | Bootloader (wrong bootloader) |
Panic codes
| Value | Description |
|---|---|
| 0x0 | No information |
| 0x1 | Package2 signature verification failed |
| 0x2 | Package2 meta verification failed |
| 0x3 | Package2 version check failed |
| 0x4 | Package2 payload verification failed |
| 0x5 | Unknown SMC |
| 0x6 | Unknown Abort |
| 0x7 | |
| 0x8 | |
| 0x10 | Unknown exception |
| 0x20 | Rebooting into SafeMode |
| 0x21 | Rebooting for anti-downgrade |
| 0x30 | General bootloader error |
| 0x31 | Invalid DRAM ID |
| 0x32 | Invalid size |
| 0x33 | Invalid argument |
| 0x34 | Bad GPT |
| 0x35 | Failed to boot SafeMode |
| 0x40 | Show error called (kernel panic) |