SVC: Difference between revisions
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| [S2] 0x81 || Result || LockGpuSharableMemory || PhysicalMemoryInfo* info_out, Handle process_handle, uintptr_t address, size_t size | | [S2] 0x81 || Result || LockGpuSharableMemory || PhysicalMemoryInfo* info_out, Handle process_handle, uintptr_t address, size_t size | ||
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| [S2] | | [S2] 0x82 || Result || UnlockGpuSharableMemory || Handle process_handle, uintptr_t address, size_t size | ||
|- style="border-top: double" | |- style="border-top: double" | ||
| [15.0.0+] 0x90 || Result || MapInsecurePhysicalMemory || uintptr_t address, size_t size | | [15.0.0+] 0x90 || Result || MapInsecurePhysicalMemory || uintptr_t address, size_t size | ||
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[2.0.0+] Whitelist was extended with 0x4c4, 0x4c8, 0x4cc, 0x584, 0x588, 0x58c. | [2.0.0+] Whitelist was extended with 0x4c4, 0x4c8, 0x4cc, 0x584, 0x588, 0x58c. | ||
[2.0.0+] The IO registers in range 0x7000E400 (PMC) size 0xC00 skip the whitelist, and do a TrustZone call using [[SMC#ReadWriteRegister| | [2.0.0+] The IO registers in range 0x7000E400 (PMC) size 0xC00 skip the whitelist, and do a TrustZone call using [[SMC#ReadWriteRegister|smcReadWriteRegister]]. | ||
[4.0.0+] Access to the Memory Controller (0x70019000) also uses smcReadWriteRegister. | [4.0.0+] Access to the Memory Controller (0x70019000) also uses smcReadWriteRegister. | ||