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QueryEvent is only supported on (and implemented differently on):
QueryEvent is only supported on (and implemented differently on):
* /dev/nvhost-gpu
* /dev/nvhost-gpu
** 1: SmException_BptIntReport
** EvtId=1: SmException_BptIntReport
** 2: SmException_BptPauseReport
** EvtId=2: SmException_BptPauseReport
** 3: ErrorNotifierEvent
** EvtId=3: ErrorNotifierEvent
* /dev/nvhost-ctrl: Used to get events for SyncPts.
* /dev/nvhost-ctrl: Used to get events for syncpts.
** If bit31-28 is 1, then lower 16-bits contain event_id, bit27-16 contain syncpt_id.  
** EvtId=(event_slot | ((syncpt_id & 0xFFF) << 16) | (is_valid << 28)): New format used by [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT|NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]/[[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX|NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX]].
** If bit31-28 is 0, then lower 4-bits contain event_id, bit31-4 contains syncpt_id.
** EvtId=(event_slot | (syncpt_id << 4)): Old format used by [[#NVHOST_IOCTL_CTRL_SYNCPT_WAITEX|NVHOST_IOCTL_CTRL_SYNCPT_WAITEX]].
* /dev/nvhost-ctrl-gpu
* /dev/nvhost-ctrl-gpu
** 1: Returns error_event_handle.
** EvtId=1: Returns error_event_handle.
** 2: Returns unknown event.
** EvtId=2: Returns unknown event.
* /dev/nvhost-dbg-gpu
* /dev/nvhost-dbg-gpu
** Ignores event_id.
** Ignores EvtId.


== MapSharedMem ==
== MapSharedMem ==
Line 187: Line 187:
| 6 || [[#Reset|Reset]]
| 6 || [[#Reset|Reset]]
|-
|-
| 7 || [3.0.0+]
| 7 || [3.0.0+] [[#GetAruid2|GetAruid2]]
|}
|}


Line 210: Line 210:
== Reset ==
== Reset ==
No input. Returns an output u32 '''Err'''.
No input. Returns an output u32 '''Err'''.
== GetAruid2 ==
Unofficial name.
No input. Returns an output u64 '''Aruid''', an output bool '''IsCoreDumpEnabled''' and an output u32 '''Err'''.


= nvgem:cd =
= nvgem:cd =
Line 224: Line 229:
| 2 || [1.0.0-8.1.0] [[#ReadNextBlock|ReadNextBlock]]
| 2 || [1.0.0-8.1.0] [[#ReadNextBlock|ReadNextBlock]]
|-
|-
| 3 || [8.0.0+]
| 3 || [8.0.0+] [[#GetNextBlockSize|GetNextBlockSize]]
|-
|-
| 4 || [8.0.0+]
| 4 || [8.0.0+] [[#ReadNextBlock2|ReadNextBlock2]]
|}
|}


Line 237: Line 242:
== ReadNextBlock ==
== ReadNextBlock ==
Takes a type-0x6 output buffer. Returns an output u32 '''Err'''.
Takes a type-0x6 output buffer. Returns an output u32 '''Err'''.
== GetNextBlockSize ==
Unofficial name.
No input. Returns an output u64 '''Size''' and an output u32 '''Err'''.
== ReadNextBlock2 ==
Unofficial name.
Takes a type-0x6 output buffer and two input u64s '''Size''' and '''Offset'''. Returns an output u64 '''OutSize''' and an output u32 '''Err'''.


= nvdbg:d =
= nvdbg:d =
Line 275: Line 290:
| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]
| 0xC010001D || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT]]
|-
|-
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_SINGLE]]
| 0xC010001E || Inout || 16 || [[#NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX]]
|-
|-
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_ALLOC_EVENT]]
| 0xC004001F || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_ALLOC_EVENT]]
Line 283: Line 298:
| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENT_BATCH]]
| 0x40080021 || In || 8 || [[#NVHOST_IOCTL_CTRL_SYNCPT_FREE_EVENT_BATCH]]
|-
|-
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL]]
| 0xC0040022 || Inout || 4 || [[#NVHOST_IOCTL_CTRL_SYNCPT_GET_SHIFT]]
|}
|}


Line 315: Line 330:
   struct {
   struct {
     __in u32 id;
     __in u32 id;
     __in u32 lock;        // (0==unlock; 1==lock)
     __in u32 lock;        // 0=unlock, 1=lock
   };
   };


Line 361: Line 376:


   struct {
   struct {
     __in u32 event_id;         // 0x00 to 0x3F
     __in u32 event_slot;       // 0x00 to 0x3F
   };
   };


=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT ===
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT ===
Waits on a syncpt using events. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (((('''id''' & 0xFFF) << 0x10) | 0x10000000) | '''event_id''').
Waits on a syncpt using events. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to ('''event_slot''' | (('''syncpt_id''' & 0xFFF) << 16) | ('''is_valid''' << 28)).


   struct {
   struct {
Line 374: Line 389:
   };
   };


=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_SINGLE ===
=== NVHOST_IOCTL_CTRL_SYNCPT_WAIT_EVENT_EX ===
Waits on a syncpt using a specific event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to (('''id''' * 0x10) | '''event_id''').
Waits on a syncpt using a specific event. If waiting fails, returns error code 0x05 (Timeout) and sets '''value''' to ('''event_slot''' | ('''syncpt_id''' << 4)).


   struct {
   struct {
Line 381: Line 396:
     __in    u32 thresh;
     __in    u32 thresh;
     __in    s32 timeout;
     __in    s32 timeout;
     __inout u32 value;          // in=event_id; out=syncpt_value
     __inout u32 value;          // in=event_slot; out=syncpt_value
   };
   };


Line 388: Line 403:


   struct {
   struct {
     __in u32 event_id;           // 0x00 to 0x3F
     __in u32 event_slot;         // 0x00 to 0x3F
   };
   };


Line 395: Line 410:


   struct {
   struct {
     __in u32 event_id;           // 0x00 to 0x3F
     __in u32 event_slot;         // 0x00 to 0x3F
   };
   };


Line 402: Line 417:


   struct {
   struct {
     __in u64 event_id_mask;     // 64-bit bitfield where each bit represents one event
     __in u64 event_slot_mask;   // 64-bit bitfield where each bit represents one event
   };
   };


=== NVHOST_IOCTL_CTRL_GET_MAX_EVENT_FIFO_CHANNEL ===
=== NVHOST_IOCTL_CTRL_SYNCPT_GET_SHIFT ===
If event FIFO is enabled, returns the maximum channel number.
Returns the syncpt shift value.


   struct {
   struct {
     __out u32 max_channel;       // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
     __out u32 syncpt_shift;     // 0x00 (FIFO disabled) or 0x60 (FIFO enabled)
   };
   };


Line 578: Line 593:
! Value || Direction || Size || Description
! Value || Direction || Size || Description
|-
|-
| 0x80040212 || Out || 4 || NVDISP_CTRL_NUM_OUTPUTS
| 0x80040212 || Out || 4 || [[#NVDISP_CTRL_NUM_OUTPUTS]]
|-
|-
| 0xC0140213 || Inout || 20 || NVDISP_CTRL_GET_DISPLAY_PROPERTIES
| 0xC0140213 || Inout || 20 || NVDISP_CTRL_GET_DISPLAY_PROPERTIES
|-
|-
| 0xC1100214 || Inout || 272 || NVDISP_CTRL_QUERY_EDID
| 0xC2100214</br>([1.0.0-11.0.1] 0xC1100214) || Inout || 528</br>([1.0.0-11.0.1] 272) || NVDISP_CTRL_QUERY_EDID
|-
|-
| 0xC0080216</br>([1.0.0-3.0.0] 0xC0040216) || Inout || 8</br>([1.0.0-3.0.0] 4) || NVDISP_CTRL_GET_EXT_HPD_IN_OUT_EVENTS</br>([1.0.0-3.0.0] NVDISP_CTRL_GET_EXT_HPD_IN_EVENT)
| 0xC0080216</br>([1.0.0-3.0.0] 0xC0040216) || Inout || 8</br>([1.0.0-3.0.0] 4) || NVDISP_CTRL_GET_EXT_HPD_IN_OUT_EVENTS</br>([1.0.0-3.0.0] NVDISP_CTRL_GET_EXT_HPD_IN_EVENT)
Line 594: Line 609:
| 0xC0040220 || Inout || 4 || NVDISP_CTRL_SUSPEND
| 0xC0040220 || Inout || 4 || NVDISP_CTRL_SUSPEND
|-
|-
| 0x80010224 || Out || 1 || [11.0.0+]
| 0x80010224 || Out || 1 || [11.0.0+] [[#NVDISP_CTRL_IS_DISPLAY_OLED]]
|}
|}
=== NVDISP_CTRL_NUM_OUTPUTS ===
  struct {
    __out u32 num_outputs;
  };
=== NVDISP_CTRL_IS_DISPLAY_OLED ===
This sets a boolean value based on the values of the system configuration.
Returns true if "nvservices!internal_display_vddpn_control" is set to false and "nvservices!external_display_full_dp_lanes" is set to true.
  struct {
    __out u8 is_display_oled;
  };


== /dev/nvdisp-disp0, /dev/nvdisp-disp1 ==
== /dev/nvdisp-disp0, /dev/nvdisp-disp1 ==
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| 0xC4C80203 || In || 1224 || NVDISP_FLIP
| 0xC4C80203 || In || 1224 || NVDISP_FLIP
|-
|-
| 0x80380204 || Out || 56 || NVDISP_GET_MODE
| 0x80380204 || Out || 56 || [[#NVDISP_GET_MODE]]
|-
|-
| 0x40380205 || Out || 56 || NVDISP_SET_MODE
| 0x40380205 || In || 56 || [[#NVDISP_SET_MODE]]
|-
|-
| 0x430C0206 || In || 780 || NVDISP_SET_LUT
| 0x430C0206 || In || 780 || NVDISP_SET_LUT
Line 619: Line 650:
| 0x80040209 || Out || 4 || NVDISP_GET_HEAD_STATUS
| 0x80040209 || Out || 4 || NVDISP_GET_HEAD_STATUS
|-
|-
| 0xC038020A || Inout || 56 || NVDISP_VALIDATE_MODE
| 0xC038020A || Inout || 56 || [[#NVDISP_VALIDATE_MODE]]
|-
|-
| 0x4018020B || In || 24 || NVDISP_SET_CSC
| 0x4018020B || In || 24 || NVDISP_SET_CSC
Line 631: Line 662:
| 0xC004020F || Inout || 4 || NVDISP_DPMS
| 0xC004020F || Inout || 4 || NVDISP_DPMS
|-
|-
| 0x80600210 || Out || 96 || NVDISP_GET_AVI_INFOFRAME
| 0x80600210 || Out || 96 || [[#NVDISP_GET_AVI_INFOFRAME]]
|-
|-
| 0x40600211 || In || 96 || NVDISP_SET_AVI_INFOFRAME
| 0x40600211 || In || 96 || [[#NVDISP_SET_AVI_INFOFRAME]]
|-
|-
| 0xEBFC0215 || Inout || 11260 || NVDISP_GET_MODE_DB
| 0xEBFC0215 || Inout || 11260 || [[#NVDISP_GET_MODE_DB]]
|-
|-
| 0xC003021A || Inout || 3 || NVDISP_PANEL_GET_VENDOR_ID
| 0xC003021A || Inout || 3 || [[#NVDISP_PANEL_GET_VENDOR_ID]]
|-
|-
| 0x803C021B || Out || 60 || NVDISP_GET_MODE2
| 0x803C021B || Out || 60 || [[#NVDISP_GET_MODE2]]
|-
|-
| 0x403C021C || In || 60 || NVDISP_SET_MODE2
| 0x403C021C || In || 60 || [[#NVDISP_SET_MODE2]]
|-
|-
| 0xC03C021D || Inout || 60 || NVDISP_VALIDATE_MODE2
| 0xC03C021D || Inout || 60 || [[#NVDISP_VALIDATE_MODE2]]
|-
|-
| 0xEF20021E || Inout || 12064 || NVDISP_GET_MODE_DB2
| 0xEF20021E || Inout || 12064 || [[#NVDISP_GET_MODE_DB2]]
|-
|-
| 0xC004021F || Inout || 4 || NVDISP_GET_WINMASK
| 0xC004021F || Inout || 4 || NVDISP_GET_WINMASK
Line 651: Line 682:
| 0x80080221 || Out || 8 || [10.0.0+] [[#NVDISP_GET_BACKLIGHT_RANGE]]
| 0x80080221 || Out || 8 || [10.0.0+] [[#NVDISP_GET_BACKLIGHT_RANGE]]
|-
|-
| 0x40040222 || In || 4 || [10.0.0+] [[#NVDISP_SET_BACKLIGHT]]
| 0x40040222 || In || 4 || [10.0.0+] [[#NVDISP_SET_BACKLIGHT_RANGE_MAX]]
|-
|-
| 0x40040223 || In || 4 || [11.0.0+]  
| 0x40040223 || In || 4 || [11.0.0+] [[#NVDISP_SET_BACKLIGHT_RANGE_MIN]]
|-
|-
| 0x401C0225 || In || 28 || [11.0.0+] [[#NVDISP_SEND_PANEL_MSG]]
| 0x401C0225 || In || 28 || [11.0.0+] [[#NVDISP_SEND_PANEL_MSG]]
Line 660: Line 691:
|}
|}


=== NVDISP_GET_BACKLIGHT_RANGE ===
=== NVDISP_GET_MODE ===
Returns the minimum and maximum values for the intensity of the display's backlight.
Almost identical to Linux driver.


   struct {
   struct {
     __out u32 min;
     __out u32 hActive;
     __out u32 max;
     __out u32 vActive;
    __out u32 hSyncWidth;
    __out u32 vSyncWidth;
    __out u32 hFrontPorch;
    __out u32 vFrontPorch;
    __out u32 hBackPorch;
    __out u32 vBackPorch;
    __out u32 hRefToSync;
    __out u32 vRefToSync;
    __out u32 pclkKHz;
    __out u32 bitsPerPixel;      // Always 0
    __out u32 vmode;            // Always 0
    __out u32 sync;
   };
   };


=== NVDISP_SET_BACKLIGHT ===
=== NVDISP_SET_MODE ===
Sets the value for the intensity of the display's backlight.
Almost identical to Linux driver.


   struct {
   struct {
     __in u32 val;
     __in u32 hActive;
    __in u32 vActive;
    __in u32 hSyncWidth;
    __in u32 vSyncWidth;
    __in u32 hFrontPorch;
    __in u32 vFrontPorch;
    __in u32 hBackPorch;
    __in u32 vBackPorch;
    __in u32 hRefToSync;
    __in u32 vRefToSync;
    __in u32 pclkKHz;
    __in u32 bitsPerPixel;
    __in u32 vmode;
    __in u32 sync;
   };
   };


=== NVDISP_SEND_PANEL_MSG ===
=== NVDISP_VALIDATE_MODE ===
Sends raw data to the display panel over DPAUX.
Almost identical to Linux driver.


   struct {
   struct {
     __in u32 cmd;         // DPAUX AUXCTL command (1=unk, 2=I2CWR, 4=MOTWR, 7=AUXWR)
     __inout u32 hActive;
     __in u32 addr;         // DPAUX AUXADDR
     __inout u32 vActive;
     __in u32 size;         // message size
     __inout u32 hSyncWidth;
     __in u32 msg[4];       // raw AUXDATA message
     __inout u32 vSyncWidth;
    __inout u32 hFrontPorch;
    __inout u32 vFrontPorch;
    __inout u32 hBackPorch;
    __inout u32 vBackPorch;
    __inout u32 hRefToSync;
    __inout u32 vRefToSync;
    __inout u32 pclkKHz;
    __inout u32 bitsPerPixel;
    __inout u32 vmode;
    __inout u32 sync;
   };
   };


=== NVDISP_GET_PANEL_DATA ===
=== NVDISP_GET_AVI_INFOFRAME ===
Receives raw data from the display panel over DPAUX.
Unpacked standard AVI infoframe struct (HDMI v1.4b/2.0)


   struct {
   struct {
     __in u32 cmd;         // DPAUX AUXCTL command (3=I2CRD, 5=MOTRD, 6=AUXRD)
     __out u32 csum;
     __in u32 addr;         // DPAUX AUXADDR
    __out u32 scan;
     __in u32 size;         // message size
    __out u32 bar_valid;
     __out u32 msg[4];     // raw AUXDATA message
    __out u32 act_fmt_valid;
    __out u32 rgb_ycc;
    __out u32 act_format;
    __out u32 aspect_ratio;
    __out u32 colorimetry;
    __out u32 scaling;
    __out u32 rgb_quant;
    __out u32 ext_colorimetry;
    __out u32 it_content;
    __out u32 video_format;
    __out u32 pix_rep;
    __out u32 it_content_type;
    __out u32 ycc_quant;
    __out u32 top_bar_end_line_lsb;
    __out u32 top_bar_end_line_msb;
    __out u32 bot_bar_start_line_lsb;
    __out u32 bot_bar_start_line_msb;
    __out u32 left_bar_end_pixel_lsb;
    __out u32 left_bar_end_pixel_msb;
    __out u32 right_bar_start_pixel_lsb;
    __out u32 right_bar_start_pixel_msb;
  };
 
=== NVDISP_SET_AVI_INFOFRAME ===
Unpacked standard AVI infoframe struct (HDMI v1.4b/2.0)
 
  struct {
    __in u32 csum;
    __in u32 scan;
    __in u32 bar_valid;
    __in u32 act_fmt_valid;
    __in u32 rgb_ycc;
    __in u32 act_format;
    __in u32 aspect_ratio;
    __in u32 colorimetry;
    __in u32 scaling;
    __in u32 rgb_quant;
    __in u32 ext_colorimetry;
    __in u32 it_content;
    __in u32 video_format;
     __in u32 pix_rep;
    __in u32 it_content_type;
    __in u32 ycc_quant;
    __in u32 top_bar_end_line_lsb;
    __in u32 top_bar_end_line_msb;
    __in u32 bot_bar_start_line_lsb;
    __in u32 bot_bar_start_line_msb;
    __in u32 left_bar_end_pixel_lsb;
    __in u32 left_bar_end_pixel_msb;
     __in u32 right_bar_start_pixel_lsb;
     __in u32 right_bar_start_pixel_msb;
   };
   };


== /dev/nvcec-ctrl ==
=== NVDISP_GET_MODE_DB ===
{| class="wikitable" border="1"
Almost identical to Linux driver.
! Value || Direction || Size || Description
|-
| 0x40010301 || In || 1 || NVCEC_CTRL_ENABLE
|-
| 0x804C0302 || Out || 76 || NVCEC_CTRL_GET_PADDR
|-
| 0x40040303 || In || 4 || NVCEC_CTRL_SET_LADDR
|-
| 0xC04C0304 || Inout || 76 || NVCEC_CTRL_WRITE
|-
| 0xC04C0305 || Inout || 76 || NVCEC_CTRL_READ
|-
| 0x804C0306 || Out || 76 || NVCEC_CTRL_GET_CONNECTION_STATUS
|-
| 0x804C0307 || Out || 76 || NVCEC_CTRL_GET_WRITE_STATUS
|}


== /dev/nvhdcp_up-ctrl ==
  struct mode {
{| class="wikitable" border="1"
    u32 hActive;
! Value || Direction || Size || Description
    u32 vActive;
|-
    u32 hSyncWidth;
| 0xC4880401 || Inout || 1160 || NVHDCP_READ_STATUS
    u32 vSyncWidth;
|-
    u32 hFrontPorch;
| 0xC4880402 || Inout || 1160 || NVHDCP_READ_M
    u32 vFrontPorch;
|-
    u32 hBackPorch;
| 0x40010403 || In || 1 || NVHDCP_ENABLE
    u32 vBackPorch;
|-
    u32 hRefToSync;
| 0xC0080404 || Inout || 8 || NVHDCP_CTRL_STATE_TRANSIT_EVENT_DATA
    u32 vRefToSync;
|-
    u32 pclkKHz;
| 0xC0010405 || Inout || 1 || NVHDCP_CTRL_STATE_CB
    u32 bitsPerPixel;
|}
    u32 vmode;
    u32 sync;
  };
  struct {
    __out struct mode modes[201];
    __out u32 num_modes;
  };
 
=== NVDISP_PANEL_GET_VENDOR_ID ===
 
Returns display panel's informations.
 
  struct {
    __out u8 vendor; //0x10 - JDI, 0x20 - InnoLux, 0x30 - AUO, 0x40 - Sharp, 0x50 - Samsung
    __out u8 model;
    __out u8 board; //0xF - 6.2", 0x10 - 5.5", 0x20 - 7.0". JDI panels have nonstandard values
  };
 
=== NVDISP_GET_MODE2 ===
 
  struct {
    __out u32 unk0;              //Always 0
    __out u32 hActive;
    __out u32 vActive;
    __out u32 hSyncWidth;
    __out u32 vSyncWidth;
    __out u32 hFrontPorch;
    __out u32 vFrontPorch;
    __out u32 hBackPorch;
    __out u32 vBackPorch;
    __out u32 pclkKHz;
    __out u32 bitsPerPixel;      // Always 0
    __out u32 vmode;            // Always 0
    __out u32 sync;
    __out u32 unk1;
    __out u32 reserved;
  };
 
=== NVDISP_SET_MODE2 ===


== /dev/nvdcutil-disp0, /dev/nvdcutil-disp1 ==
  struct {
{| class="wikitable" border="1"
    __in u32 unk0;
! Value || Direction || Size || Description
    __in u32 hActive;
|-
    __in u32 vActive;
| 0x40010501 || In || 1 || NVDCUTIL_ENABLE_CRC
    __in u32 hSyncWidth;
|-
    __in u32 vSyncWidth;
| 0x40010502 || In || 1 || NVDCUTIL_VIRTUAL_EDID_ENABLE
    __in u32 hFrontPorch;
|-
    __in u32 vFrontPorch;
| 0x42040503 || In || 1056 || NVDCUTIL_VIRTUAL_EDID_SET_DATA
    __in u32 hBackPorch;
|-
    __in u32 vBackPorch;
| 0x803C0504 || Out || 60 || NVDCUTIL_GET_MODE
    __in u32 pclkKHz;
|-
    __in u32 bitsPerPixel;
| 0x40010505 || In || 1 || NVDCUTIL_BEGIN_TELEMETRY_TEST
    __in u32 vmode;
|-
    __in u32 sync;
| 0x400C0506 || In || 12 || NVDCUTIL_DSI_PACKET_TEST_SHORT_WRITE
    __in u32 unk1;
|-
    __in u32 reserved;
| 0x40F80507 || In || 248 || NVDCUTIL_DSI_PACKET_TEST_LONG_WRITE
  };
|-
 
| 0xC0F40508 || Inout || 244 || NVDCUTIL_DSI_PACKET_TEST_READ
=== NVDISP_VALIDATE_MODE2 ===
|-
| 0x40010509 || In || 1 || [10.0.0+] NVDCUTIL_DP_ELECTRIC_TEST_EN
|-
| 0xC020050A || Inout || 32 || [10.0.0+] NVDCUTIL_DP_ELECTRIC_TEST_SETTINGS
|-
| 0x8070050B || Out || 112 || [11.0.0+] NVDCUTIL_DP_CONF_READ
|}


== /dev/nvsched-ctrl ==
  struct {
This is a customized scheduler device.
    __inout u32 unk0;
    __inout u32 hActive;
    __inout u32 vActive;
    __inout u32 hSyncWidth;
    __inout u32 vSyncWidth;
    __inout u32 hFrontPorch;
    __inout u32 vFrontPorch;
    __inout u32 hBackPorch;
    __inout u32 vBackPorch;
    __inout u32 pclkKHz;
    __inout u32 bitsPerPixel;
    __inout u32 vmode;
    __inout u32 sync;
    __inout u32 unk1;
    __inout u32 reserved;
  };


The way this device is exposed and configured is exclusive to the Switch, since other sources don't have an actual interface for the scheduler.
=== NVDISP_GET_MODE_DB2 ===


{| class="wikitable" border="1"
  struct mode2 {
! Value || Direction || Size || Description
    u32 unk0;
|-
    u32 hActive;
| 0x00000601 || - || 0 || [[#NVSCHED_CTRL_ENABLE]]
    u32 vActive;
|-
    u32 hSyncWidth;
| 0x00000602 || - || 0 || [[#NVSCHED_CTRL_DISABLE]]
    u32 vSyncWidth;
|-
    u32 hFrontPorch;
| 0x40180603 || In || 24 || [[#NVSCHED_CTRL_ADD_APPLICATION]]
    u32 vFrontPorch;
|-
    u32 hBackPorch;
| 0x40180604 || In || 24 || [[#NVSCHED_CTRL_UPDATE_APPLICATION]]
    u32 vBackPorch;
|-
    u32 pclkKHz;
| 0x40080605 || In || 8 || [[#NVSCHED_CTRL_REMOVE_APPLICATION]]
    u32 bitsPerPixel;
|-
    u32 vmode;
| 0x80080606 || Out || 8 || [[#NVSCHED_CTRL_GET_ID]]
    u32 sync;
|-
    u32 unk1;
| 0x80080607 || Out || 8 || [[#NVSCHED_CTRL_ADD_RUNLIST]]
    u32 reserved;
|-
  };
| 0x40180608 || In || 24 || [[#NVSCHED_CTRL_UPDATE_RUNLIST]]
|-
  struct {
| 0x40100609 || In || 16 || [[#NVSCHED_CTRL_LINK_RUNLIST]]
    __out struct mode2 modes[201];
    __out u32 num_modes;
  };
 
=== NVDISP_GET_BACKLIGHT_RANGE ===
Returns the minimum and maximum values for the intensity of the display's backlight.
 
  struct {
    __out u32 min;
    __out u32 max;
  };
 
=== NVDISP_SET_BACKLIGHT_RANGE_MAX ===
Sets the maximum value for the intensity of the display's backlight.
 
  struct {
    __in u32 max;
  };
 
=== NVDISP_SET_BACKLIGHT_RANGE_MIN ===
Sets the minimum value for the intensity of the display's backlight.
 
  struct {
    __in u32 min;
  };
 
=== NVDISP_SEND_PANEL_MSG ===
Sends raw data to the display panel over DPAUX.
 
  struct {
    __in u32 cmd;          // DPAUX AUXCTL command (1=unk, 2=I2CWR, 4=MOTWR, 7=AUXWR)
    __in u32 addr;        // DPAUX AUXADDR
    __in u32 size;        // message size
    __in u32 msg[4];      // raw AUXDATA message
  };
 
=== NVDISP_GET_PANEL_DATA ===
Receives raw data from the display panel over DPAUX.
 
  struct {
    __in u32 cmd;          // DPAUX AUXCTL command (3=I2CRD, 5=MOTRD, 6=AUXRD)
    __in u32 addr;        // DPAUX AUXADDR
    __in u32 size;        // message size
    __out u32 msg[4];      // raw AUXDATA message
  };
 
== /dev/nvcec-ctrl ==
{| class="wikitable" border="1"
! Value || Direction || Size || Description
|-
|-
| 0x4010060A || In || 16 || [[#NVSCHED_CTRL_UNLINK_RUNLIST]]
| 0x40010301 || In || 1 || NVCEC_CTRL_ENABLE
|-
|-
| 0x4008060B || In || 8 || [[#NVSCHED_CTRL_REMOVE_RUNLIST]]
| 0x804C0302 || Out || 76 || NVCEC_CTRL_GET_PADDR
|-
|-
| 0x8001060C || Out || 1 || [[#NVSCHED_CTRL_HAS_OVERRUN_EVENT]]
| 0x40040303 || In || 4 || NVCEC_CTRL_SET_LADDR
|-
| 0xC04C0304 || Inout || 76 || NVCEC_CTRL_WRITE
|-
| 0xC04C0305 || Inout || 76 || NVCEC_CTRL_READ
|-
| 0x804C0306 || Out || 76 || NVCEC_CTRL_GET_CONNECTION_STATUS
|-
|-
| 0x8020060D</br>([1.0.0-3.0.0] 0x8010060D) || Out || 32</br>([1.0.0-3.0.0] 16) || [[#NVSCHED_CTRL_GET_NEXT_OVERRUN_EVENT]]
| 0x804C0307 || Out || 76 || NVCEC_CTRL_GET_WRITE_STATUS
|}
 
== /dev/nvhdcp_up-ctrl ==
{| class="wikitable" border="1"
! Value || Direction || Size || Description
|-
|-
| 0x400C060E || In || 12 || [[#NVSCHED_CTRL_PUT_CONDUCTOR_FLIP_FENCE]]
| 0xC4880401 || Inout || 1160 || NVHDCP_READ_STATUS
|-
|-
| 0x4008060F || In || 8 || [[#NVSCHED_CTRL_DETACH_APPLICATION]]
| 0xC4880402 || Inout || 1160 || NVHDCP_READ_M
|-
|-
| 0x40100610 || In || 16 || NVSCHED_CTRL_SET_APPLICATION_MAX_DEBT
| 0x40010403 || In || 1 || NVHDCP_ENABLE
|-
|-
| 0x40100611 || In || 16 || NVSCHED_CTRL_SET_RUNLIST_MAX_DEBT
| 0xC0080404 || Inout || 8 || NVHDCP_CTRL_STATE_TRANSIT_EVENT_DATA
|-
|-
| 0x40010612 || In || 1 || NVSCHED_CTRL_OVERRUN_EVENTS_ENABLE
| 0xC0010405 || Inout || 1 || NVHDCP_CTRL_STATE_CB
|}
|}


=== NVSCHED_CTRL_ENABLE ===
== /dev/nvdcutil-disp0, /dev/nvdcutil-disp1 ==
Enables the scheduler.
{| class="wikitable" border="1"
 
! Value || Direction || Size || Description
=== NVSCHED_CTRL_DISABLE ===
|-
Disables the scheduler.
| 0x40010501 || In || 1 || NVDCUTIL_ENABLE_CRC
|-
| 0x40010502 || In || 1 || [[#NVDCUTIL_VIRTUAL_EDID_ENABLE]]
|-
| 0x42040503 || In || 516 || [[#NVDCUTIL_VIRTUAL_EDID_SET_DATA]]
|-
| 0x803C0504 || Out || 60 || NVDCUTIL_GET_MODE
|-
| 0x40010505 || In || 1 || NVDCUTIL_BEGIN_TELEMETRY_TEST
|-
| 0x400C0506 || In || 12 || NVDCUTIL_DSI_PACKET_TEST_SHORT_WRITE
|-
| 0x40F80507 || In || 248 || NVDCUTIL_DSI_PACKET_TEST_LONG_WRITE
|-
| 0xC0F40508 || Inout || 244 || NVDCUTIL_DSI_PACKET_TEST_READ
|-
| 0x40010509 || In || 1 || [10.0.0+] NVDCUTIL_DP_ELECTRIC_TEST_EN
|-
| 0xC020050A || Inout || 32 || [10.0.0+] NVDCUTIL_DP_ELECTRIC_TEST_SETTINGS
|-
| 0x8070050B || Out || 112 || [11.0.0+] NVDCUTIL_DP_CONF_READ
|}


=== NVSCHED_CTRL_ADD_APPLICATION ===
=== NVDCUTIL_VIRTUAL_EDID_ENABLE ===
Adds a new application to the scheduler.


   struct {
   struct {
     __in u64 application_id;
     __in u8 enable;
    __in u64 priority;
    __in u64 timeslice;
   };
   };


=== NVSCHED_CTRL_UPDATE_APPLICATION ===
=== NVDCUTIL_VIRTUAL_EDID_SET_DATA ===
Updates the application parameters in the scheduler.


   struct {
   struct {
     __in u64 application_id;
     __in u8 edid[512];
     __in u64 priority;
     __in u32 edid_size;
    __in u64 timeslice;
   };
   };


=== NVSCHED_CTRL_REMOVE_APPLICATION ===
== /dev/nvsched-ctrl ==
Removes the application from the scheduler.
This is a customized scheduler device.


  struct {
The way this device is exposed and configured is exclusive to the Switch, since other sources don't have an actual interface for the scheduler.
    __in u64 application_id;
  };


=== NVSCHED_CTRL_GET_ID ===
{| class="wikitable" border="1"
Returns the ID of the last scheduled object.
! Value || Direction || Size || Description
 
|-
  struct {
| 0x00000601 || - || 0 || [[#NVSCHED_CTRL_ENABLE]]
    __out u64 id;
|-
  };
| 0x00000602 || - || 0 || [[#NVSCHED_CTRL_DISABLE]]
 
|-
=== NVSCHED_CTRL_ADD_RUNLIST ===
| 0x40180603 || In || 24 || [[#NVSCHED_CTRL_ADD_APPLICATION]]
Creates a new runlist and returns it's ID.
|-
 
| 0x40180604 || In || 24 || [[#NVSCHED_CTRL_UPDATE_APPLICATION]]
  struct {
|-
    __out u64 runlist_id;
| 0x40080605 || In || 8 || [[#NVSCHED_CTRL_REMOVE_APPLICATION]]
  };
|-
 
| 0x80080606 || Out || 8 || [[#NVSCHED_CTRL_GET_ID]]
=== NVSCHED_CTRL_UPDATE_RUNLIST ===
|-
Updates the runlist parameters in the scheduler.
| 0x80080607 || Out || 8 || [[#NVSCHED_CTRL_ADD_RUNLIST]]
 
|-
  struct {
| 0x40180608 || In || 24 || [[#NVSCHED_CTRL_UPDATE_RUNLIST]]
    __in u64 runlist_id;
|-
    __in u64 priority;
| 0x40100609 || In || 16 || [[#NVSCHED_CTRL_LINK_RUNLIST]]
    __in u64 timeslice;
|-
  };
| 0x4010060A || In || 16 || [[#NVSCHED_CTRL_UNLINK_RUNLIST]]
 
|-
=== NVSCHED_CTRL_LINK_RUNLIST ===
| 0x4008060B || In || 8 || [[#NVSCHED_CTRL_REMOVE_RUNLIST]]
Links a runlist to a given application in the scheduler.
|-
| 0x8001060C || Out || 1 || [[#NVSCHED_CTRL_HAS_OVERRUN_EVENT]]
|-
| 0x8020060D</br>([1.0.0-3.0.0] 0x8010060D) || Out || 32</br>([1.0.0-3.0.0] 16) || [[#NVSCHED_CTRL_GET_NEXT_OVERRUN_EVENT]]
|-
| 0x400C060E || In || 12 || [[#NVSCHED_CTRL_PUT_CONDUCTOR_FLIP_FENCE]]
|-
| 0x4008060F || In || 8 || [[#NVSCHED_CTRL_DETACH_APPLICATION]]
|-
| 0x40100610 || In || 16 || NVSCHED_CTRL_SET_APPLICATION_MAX_DEBT
|-
| 0x40100611 || In || 16 || NVSCHED_CTRL_SET_RUNLIST_MAX_DEBT
|-
| 0x40010612 || In || 1 || NVSCHED_CTRL_OVERRUN_EVENTS_ENABLE
|}
 
=== NVSCHED_CTRL_ENABLE ===
Enables the scheduler.
 
=== NVSCHED_CTRL_DISABLE ===
Disables the scheduler.
 
=== NVSCHED_CTRL_ADD_APPLICATION ===
Adds a new application to the scheduler.


   struct {
   struct {
    __in u64 runlist_id;
     __in u64 application_id;
     __in u64 application_id;
    __in u64 priority;
    __in u64 timeslice;
   };
   };


=== NVSCHED_CTRL_UNLINK_RUNLIST ===
=== NVSCHED_CTRL_UPDATE_APPLICATION ===
Unlinks a runlist from a given application in the scheduler.
Updates the application parameters in the scheduler.


   struct {
   struct {
    __in u64 runlist_id;
     __in u64 application_id;
     __in u64 application_id;
    __in u64 priority;
    __in u64 timeslice;
   };
   };


=== NVSCHED_CTRL_REMOVE_RUNLIST ===
=== NVSCHED_CTRL_REMOVE_APPLICATION ===
Removes the runlist from the scheduler.
Removes the application from the scheduler.


   struct {
   struct {
     __in u64 runlist_id;
     __in u64 application_id;
   };
   };


=== NVSCHED_CTRL_HAS_OVERRUN_EVENT ===
=== NVSCHED_CTRL_GET_ID ===
Returns a boolean to tell if the scheduler has an overrun event or not.
Returns the ID of the last scheduled object.


   struct {
   struct {
     __out u8 has_overrun;
     __out u64 id;
   };
   };


=== NVSCHED_CTRL_GET_NEXT_OVERRUN_EVENT ===
=== NVSCHED_CTRL_ADD_RUNLIST ===
Returns the overrun event's data from the scheduler.
Creates a new runlist and returns it's ID.


   struct {
   struct {
     __out u64 runlist_id;
     __out u64 runlist_id;
    __out u64 debt;
    __out u64 unk0;          // 3.0.0+ only
    __out u64 unk1;          // 3.0.0+ only
   };
   };


=== NVSCHED_CTRL_PUT_CONDUCTOR_FLIP_FENCE ===
=== NVSCHED_CTRL_UPDATE_RUNLIST ===
Installs a fence swap event?
Updates the runlist parameters in the scheduler.


   struct {
   struct {
     __in u32 fence_id;
     __in u64 runlist_id;
     __in u32 fence_thresh;
     __in u64 priority;
     __in u32 swap_interval;
     __in u64 timeslice;
   };
   };


=== NVSCHED_CTRL_DETACH_APPLICATION ===
=== NVSCHED_CTRL_LINK_RUNLIST ===
Places the given application in detached state.
Links a runlist to a given application in the scheduler.


   struct {
   struct {
    __in u64 runlist_id;
     __in u64 application_id;
     __in u64 application_id;
   };
   };


== /dev/nverpt-ctrl ==
=== NVSCHED_CTRL_UNLINK_RUNLIST ===
Added in firmware version 3.0.0.
Unlinks a runlist from a given application in the scheduler.


{| class="wikitable" border="1"
  struct {
! Value || Direction || Size || Description
    __in u64 runlist_id;
|-
    __in u64 application_id;
| 0xC1280701 || Inout || 296 || [[#NVERPT_TELEMETRY_SUBMIT_DATA]]
  };
|-
| 0xCF580702 || Inout || 3928 || [[#NVERPT_TELEMETRY_SUBMIT_DISPLAY_DATA]]
|}


=== NVERPT_TELEMETRY_SUBMIT_DATA ===
=== NVSCHED_CTRL_REMOVE_RUNLIST ===
Sends test data for creating a new [[Error_Report_services|Error Report]].
Removes the runlist from the scheduler.


   struct {
   struct {
     __in u64 TestU64;
     __in u64 runlist_id;
    __in u32 TestU32;
  };
    __in u8  padding0[4];
 
    __in s64 TestI64;
=== NVSCHED_CTRL_HAS_OVERRUN_EVENT ===
    __in s32 TestI32;
Returns a boolean to tell if the scheduler has an overrun event or not.
    __in u8  TestString[32];
 
    __in u8  TestU8Array[8];
  struct {
    __in u32 TestU8Array_size;
     __out u8 has_overrun;
    __in u32 TestU32Array[8];
    __in u32 TestU32Array_size;
    __in u64 TestU64Array[8];
    __in u32 TestU64Array_size;
    __in s32 TestI32Array[8];
    __in u32 TestI32Array_size;
    __in s64 TestI64Array[8];
    __in u32 TestI64Array_size;
    __in u16 TestU16;
    __in u8  TestU8;
    __in s16 TestI16;
    __in s8  TestI8;
     __in u8 padding1[5];
   };
   };


=== NVERPT_TELEMETRY_SUBMIT_DISPLAY_DATA ===
=== NVSCHED_CTRL_GET_NEXT_OVERRUN_EVENT ===
Sends display data for creating a new [[Error_Report_services|Error Report]].
Returns the overrun event's data from the scheduler.


   struct {
   struct {
     __in u32 CodecType;
     __out u64 runlist_id;
     __in u32 DecodeBuffers;
     __out u64 debt;
     __in u32 FrameWidth;
     __out u64 unk0;           // 3.0.0+ only
    __in u32 FrameHeight;
     __out u64 unk1;           // 3.0.0+ only
    __in u8  ColorPrimaries;
    __in u8  TransferCharacteristics;
     __in u8  MatrixCoefficients;
    __in u8  padding;
    __in u32 DisplayWidth;
    __in u32 DisplayHeight;
    __in u32 DARWidth;
    __in u32 DARHeight;
    __in u32 ColorFormat;
    __in u32 ColorSpace[8];
    __in u32 ColorSpace_size;
    __in u32 SurfaceLayout[8];
    __in u32 SurfaceLayout_size;
    __in u8  ErrorString[64];      // must be "Error detected = 0x1000000"
    __in u32 VideoDecState;
    __in u8  VideoLog[3712];
    __in u32 VideoLog_size;
   };
   };


== /dev/nvhost-as-gpu ==
=== NVSCHED_CTRL_PUT_CONDUCTOR_FLIP_FENCE ===
Each fd opened to this device creates an address space. An address space is then later bound with a channel.
Installs a fence swap event?
 
  struct {
    __in u32 fence_id;
    __in u32 fence_value;
    __in u32 swap_interval;
  };


Once a nvgpu channel has been bound to an address space it cannot be unbound. There is no support for allowing an nvgpu channel to change from one address space to another (or from one to none).
=== NVSCHED_CTRL_DETACH_APPLICATION ===
                                                                                                                             
Places the given application in detached state.
{| class="wikitable" border="1"
! Value || Direction || Size || Description
|-
| 0x40044101 || In || 4 || [[#NVGPU_AS_IOCTL_BIND_CHANNEL]]
|-
| 0xC0184102 || Inout || 24 || [[#NVGPU_AS_IOCTL_ALLOC_SPACE]]
|-
| 0xC0104103 || Inout || 16 || [[#NVGPU_AS_IOCTL_FREE_SPACE]]
|-
| 0xC0184104 || Inout || 24 || [[#NVGPU_AS_IOCTL_MAP_BUFFER]]
|-
| 0xC0084105 || Inout || 8 || [[#NVGPU_AS_IOCTL_UNMAP_BUFFER]]
|-
| 0xC0284106 || Inout || 40 || [[#NVGPU_AS_IOCTL_MAP_BUFFER_EX]]
|-
| 0x40104107 || In || 16 || [[#NVGPU_AS_IOCTL_ALLOC_AS]]
|-
| 0xC0404108 || Inout || 64 || [[#NVGPU_AS_IOCTL_GET_VA_REGIONS]]
|-
| 0x40284109 || In || 40 || [[#NVGPU_AS_IOCTL_ALLOC_AS_EX]]
|-
| 0xC038410A || Inout || 56 || [[#NVGPU_AS_IOCTL_MAP_BUFFER_EX2]]
|-
| 0xC0??4114 || Inout || Variable || [[#NVGPU_AS_IOCTL_REMAP]]
|}
 
=== NVGPU_AS_IOCTL_BIND_CHANNEL ===
Identical to Linux driver.


   struct {
   struct {
     __in u32 channel_fd;
     __in u64 application_id;
   };
   };


=== NVGPU_AS_IOCTL_ALLOC_SPACE ===
== /dev/nverpt-ctrl ==
Reserves pages in the device address space.
Added in firmware version 3.0.0.


  struct {
{| class="wikitable" border="1"
    __in u32 pages;
! Value || Direction || Size || Description
    __in u32 page_size;
|-
    __in u32 flags;
| 0xC1280701 || Inout || 296 || [[#NVERPT_TELEMETRY_SUBMIT_DATA]]
    u32      padding;
|-
    union {
| 0xCF580702 || Inout || 3928 || [[#NVERPT_TELEMETRY_SUBMIT_DISPLAY_DATA]]
      __out u64 offset;
|}
      __in  u64 align;
    };
  };


=== NVGPU_AS_IOCTL_FREE_SPACE ===
=== NVERPT_TELEMETRY_SUBMIT_DATA ===
Frees pages from the device address space.
Sends test data for creating a new [[Error_Report_services|Error Report]].


   struct {
   struct {
     __in u64 offset;
     __in u64 TestU64;
     __in u32 pages;
     __in u32 TestU32;
     __in u32 page_size;
    __in u8  padding0[4];
    __in s64 TestI64;
    __in s32 TestI32;
    __in u8  TestString[32];
    __in u8  TestU8Array[8];
     __in u32 TestU8Array_size;
    __in u32 TestU32Array[8];
    __in u32 TestU32Array_size;
    __in u64 TestU64Array[8];
    __in u32 TestU64Array_size;
    __in s32 TestI32Array[8];
    __in u32 TestI32Array_size;
    __in s64 TestI64Array[8];
    __in u32 TestI64Array_size;
    __in u16 TestU16;
    __in u8  TestU8;
    __in s16 TestI16;
    __in s8  TestI8;
    __in u8  padding1[5];
   };
   };


=== NVGPU_AS_IOCTL_MAP_BUFFER ===
=== NVERPT_TELEMETRY_SUBMIT_DISPLAY_DATA ===
Maps a memory region in the device address space.
Sends display data for creating a new [[Error_Report_services|Error Report]].
 
Unaligned size will cause a [[#Panic]].
 
On success, the mapped memory region is granted the [[SVC#MemoryAttribute|DeviceShared]] attribute.


   struct {
   struct {
     __in   u32 flags;       // bit0: fixed_offset, bit2: cacheable
     __in u32 CodecType;
     u32         reserved0;
    __in u32 DecodeBuffers;
     __in   u32 mem_id;       // nvmap handle
    __in u32 FrameWidth;
     u32         reserved1;
    __in u32 FrameHeight;
     union {
    __in u8  ColorPrimaries;
       __out u64 offset;
    __in u8  TransferCharacteristics;
      __in  u64 align;
    __in u8  MatrixCoefficients;
     };
    __in u8  padding;
    __in u32 DisplayWidth;
    __in u32 DisplayHeight;
    __in u32 DARWidth;
    __in u32 DARHeight;
    __in u32 ColorFormat;
     __in u32 ColorSpace[8];
     __in u32 ColorSpace_size;
     __in u32 SurfaceLayout[8];
     __in u32 SurfaceLayout_size;
    __in u8  ErrorString[64];       // must be "Error detected = 0x1000000"
    __in u32 VideoDecState;
    __in u8 VideoLog[3712];
     __in u32 VideoLog_size;
   };
   };


=== NVGPU_AS_IOCTL_MAP_BUFFER_EX ===
== /dev/nvhost-as-gpu ==
Maps a memory region in the device address space with extra params.
Each fd opened to this device creates an address space. An address space is then later bound with a channel.


Unaligned size will cause a [[#Panic]].
Once a nvgpu channel has been bound to an address space it cannot be unbound. There is no support for allowing an nvgpu channel to change from one address space to another (or from one to none).
 
                                                                                                                             
On success, the mapped memory region is granted the [[SVC#MemoryAttribute|DeviceShared]] attribute.
{| class="wikitable" border="1"
! Value || Direction || Size || Description
|-
| 0x40044101 || In || 4 || [[#NVGPU_AS_IOCTL_BIND_CHANNEL]]
|-
| 0xC0184102 || Inout || 24 || [[#NVGPU_AS_IOCTL_ALLOC_SPACE]]
|-
| 0xC0104103 || Inout || 16 || [[#NVGPU_AS_IOCTL_FREE_SPACE]]
|-
| 0xC0184104 || Inout || 24 || [[#NVGPU_AS_IOCTL_MAP_BUFFER]]
|-
| 0xC0084105 || Inout || 8 || [[#NVGPU_AS_IOCTL_UNMAP_BUFFER]]
|-
| 0xC0284106 || Inout || 40 || [[#NVGPU_AS_IOCTL_MAP_BUFFER_EX]]
|-
| 0x40104107 || In || 16 || [[#NVGPU_AS_IOCTL_ALLOC_AS]]
|-
| 0xC0404108 || Inout || 64 || [[#NVGPU_AS_IOCTL_GET_VA_REGIONS]]
|-
| 0x40284109 || In || 40 || [[#NVGPU_AS_IOCTL_ALLOC_AS_EX]]
|-
| 0xC038410A || Inout || 56 || [[#NVGPU_AS_IOCTL_MAP_BUFFER_EX2]]
|-
| 0x8010410B || Out || 16 || [S2]
|-
| 0xC020410C || Inout || 32 || [S2]
|-
| 0xC???410D || Inout || Variable || [S2]
|-
| 0xC0??4114 || Inout || Variable || [[#NVGPU_AS_IOCTL_REMAP]]
|}


   struct {
=== NVGPU_AS_IOCTL_BIND_CHANNEL ===
     __in     u32 flags;         // bit0: fixed_offset, bit2: cacheable
Identical to Linux driver.
    __inout   u32 kind;           // -1 is default
 
     __in     u32 mem_id;         // nvmap handle
   struct {
     u32           reserved;
     __in u32 channel_fd;
     __in     u64 buffer_offset;
   };
     __in     u64 mapping_size;
 
=== NVGPU_AS_IOCTL_ALLOC_SPACE ===
Reserves pages in the device address space.
 
  struct {
     __in u32 pages;
     __in u32 page_size;
     __in u32 flags;
     u32     padding;
     union {
     union {
       __out   u64 offset;
       __out u64 offset;
       __in   u64 align;
       __in u64 align;
     };
     };
   };
   };


=== NVGPU_AS_IOCTL_UNMAP_BUFFER ===
=== NVGPU_AS_IOCTL_FREE_SPACE ===
Unmaps a memory region from the device address space.
Frees pages from the device address space.


struct {
  struct {
     __in u64 offset;
     __in u64 offset;
    __in u32 pages;
    __in u32 page_size;
   };
   };


=== NVGPU_AS_IOCTL_ALLOC_AS ===
=== NVGPU_AS_IOCTL_MAP_BUFFER ===
Nintendo's custom implementation for allocating an address space.
Maps a memory region in the device address space.
 
Unaligned size will cause a [[#Panic]].
 
On success, the mapped memory region is granted the [[SVC#MemoryAttribute|DeviceShared]] attribute.


   struct {
   struct {
     __in u32 big_page_size;   // depends on GPU's available_big_page_sizes; 0=default
     __in   u32 flags;       // bit0: fixed_offset, bit2: cacheable
     __in s32 as_fd;           // ignored; passes 0
    u32        reserved0;
     __in u64 reserved;       // ignored; passes 0
     __in   u32 mem_id;       // nvmap handle
    u32        reserved1;
     union {
      __out u64 offset;
      __in u64 align;
    };
   };
   };


=== NVGPU_AS_IOCTL_GET_VA_REGIONS ===
=== NVGPU_AS_IOCTL_MAP_BUFFER_EX ===
Nintendo's custom implementation to get rid of pointer in struct.
Maps a memory region in the device address space with extra params.
 
Unaligned size will cause a [[#Panic]].
 
On success, the mapped memory region is granted the [[SVC#MemoryAttribute|DeviceShared]] attribute.


  struct va_region {
    u64 offset;
    u32 page_size;
    u32 reserved;
    u64 pages;
  };
 
   struct {
   struct {
     u64          buf_addr;   // (contained output user ptr on linux, ignored)
     __in      u32 flags;         // bit0: fixed_offset, bit2: cacheable
     __inout u32   buf_size;   // forced to 2*sizeof(struct va_region)
     __inout   u32 kind;          // -1 is default
    __in      u32 mem_id;         // nvmap handle
     u32          reserved;
     u32          reserved;
     __out struct va_region regions[2];
     __in      u64 buffer_offset;
    __in      u64 mapping_size;
    union {
      __out   u64 offset;
      __in    u64 align;
    };
  };
 
=== NVGPU_AS_IOCTL_UNMAP_BUFFER ===
Unmaps a memory region from the device address space.
 
struct {
    __in u64 offset;
   };
   };


=== NVGPU_AS_IOCTL_ALLOC_AS_EX ===
=== NVGPU_AS_IOCTL_ALLOC_AS ===
Nintendo's custom implementation for allocating an address space with extra params.
Nintendo's custom implementation for allocating an address space.


   struct {
   struct {
     __in u32 big_page_size;  // depends on GPU's available_big_page_sizes; 0=default
     __in u32 big_page_size;  // depends on GPU's available_big_page_sizes; 0=default
     __in s32 as_fd;          // ignored; passes 0
     __in s32 as_fd;          // ignored; passes 0
     __in u32 flags;          // passes 0
    __in u64 reserved;        // ignored; passes 0
     __in u32 reserved;        // ignored; passes 0
  };
 
=== NVGPU_AS_IOCTL_GET_VA_REGIONS ===
Nintendo's custom implementation to get rid of pointer in struct.
 
Uses [[#Ioctl3|Ioctl3]].
 
  struct va_region {
    u64 offset;
    u32 page_size;
    u32 reserved;
    u64 pages;
  };
 
  struct {
    u64          buf_addr;    // (contained output user ptr on linux, ignored)
    __inout u32  buf_size;    // forced to 2*sizeof(struct va_region)
    u32          reserved;
    __out struct  va_region regions[2];
  };
 
=== NVGPU_AS_IOCTL_ALLOC_AS_EX ===
Nintendo's custom implementation for allocating an address space with extra params.
 
  struct {
    __in u32 big_page_size;  // depends on GPU's available_big_page_sizes; 0=default
    __in s32 as_fd;          // ignored; passes 0
     __in u32 flags;          // passes 0
     __in u32 reserved;        // ignored; passes 0
     __in u64 va_range_start;
     __in u64 va_range_start;
     __in u64 va_range_end;
     __in u64 va_range_end;
Line 1,218: Line 1,517:
| 0xC018441A || Inout || 24 || NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA
| 0xC018441A || Inout || 24 || NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA
|-
|-
| 0xC020441B || Inout || 32 || [11.0.0+]
| 0xC020441B || Inout || 32 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_LAZY_ALLOC_RESERVED_PA_EX
|-
|-
| 0xC084441C || Inout || 132 || [11.0.0+]
| 0xC084441C || Inout || 132 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_SETTINGS
|-
|-
| 0xC018441D || Inout || 24 || [11.0.0+]
| 0xC018441D || Inout || 24 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_SERIAL_NUMBER
|-
|-
| 0xC020441E || Inout || 32 || [11.0.0+]
| 0xC020441E || Inout || 32 || [11.0.0+] NVGPU_DBG_GPU_IOCTL_GET_GPU_VA_RANGE_PAGES
|}
|-
| [S2] 0xC0184421 || || ||
|-
| [S2] 0x40084422 || || ||
|-
| [S2] 0xC0084423 || || ||
|-
| [S2] 0x40084424 || || ||
|-
| [S2] 0xC0104425 || || ||
|-
| [S2] 0x40084427 || || ||
|-
| [S2] 0x40044428 || || ||
|-
| [S2] 0xC0184429 || || ||
|-
| [S2] 0x4010442A || || ||
|-
| [S2] 0x4010442B || || ||
|}


=== NVGPU_DBG_GPU_IOCTL_GET_GR_CONTEXT ===
=== NVGPU_DBG_GPU_IOCTL_GET_GR_CONTEXT ===
Line 1,587: Line 1,906:
|-
|-
| /dev/nvhost-display || Display
| /dev/nvhost-display || Display
|-
| /dev/nvhost-tsec || TSEC
|}
|}


Line 1,619: Line 1,940:
| 0xC0??0026 || Variable || [[#NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER_EX]]
| 0xC0??0026 || Variable || [[#NVHOST_IOCTL_CHANNEL_UNMAP_CMD_BUFFER_EX]]
|- style="border-top: double"
|- style="border-top: double"
| 0x40044801 || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD]]
| 0x40044801 [S2] 0x40044101 || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD]]
|-
|-
| 0x40044803 || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_TIMEOUT]]
| 0x40044803 || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_TIMEOUT]]
Line 1,649: Line 1,970:
| 0x00004811 || 0 || [[#NVGPU_IOCTL_CHANNEL_FORCE_RESET]]
| 0x00004811 || 0 || [[#NVGPU_IOCTL_CHANNEL_FORCE_RESET]]
|-
|-
| 0x40084812 || 8 || [[#NVGPU_IOCTL_CHANNEL_EVENT_ID_CONTROL]]
| 0x40084812 [S2] 0x40104812 || 8 [S2] 16 || [[#NVGPU_IOCTL_CHANNEL_EVENT_ID_CONTROL]]
|-
|-
| 0xC0104813 || 16 || [[#NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT]]
| 0xC0104813 || 16 || [[#NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT]]
|-
| 0x40084714 || 8 || [[#NVGPU_IOCTL_CHANNEL_SET_USER_DATA]]
|-
| 0x80084715 || 8 || [[#NVGPU_IOCTL_CHANNEL_GET_USER_DATA]]
|-
|-
| 0x80804816 || 128 || [[#NVGPU_IOCTL_CHANNEL_GET_ERROR_INFO]]
| 0x80804816 || 128 || [[#NVGPU_IOCTL_CHANNEL_GET_ERROR_INFO]]
Line 1,669: Line 1,994:
| 0xC004481D || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_TIMESLICE]]
| 0xC004481D || 4 || [[#NVGPU_IOCTL_CHANNEL_SET_TIMESLICE]]
|- style="border-top: double"
|- style="border-top: double"
| 0x40084714 || 8 || [[#NVGPU_IOCTL_CHANNEL_SET_USER_DATA]]
| [S2] 0xC010481E || 16 ||
|-
| [S2] 0xC008481F || 8 ||
|-
| [S2] 0x40044820 || 4 ||
|-
|-
| 0x80084715 || 8 || [[#NVGPU_IOCTL_CHANNEL_GET_USER_DATA]]
| [S2] 0xC0504821 || 80 ||  
|}
|}


Line 1,700: Line 2,029:
   };
   };
    
    
   struct {
   struct {
     __in    u32 num_cmdbufs;
     __in    u32 num_cmdbufs;
Line 1,823: Line 2,151:
   struct {
   struct {
     __in u32 num_entries;
     __in u32 num_entries;
     __in u32 flags;
     __in u32 flags;           // bit0: vpr_enabled
   };
   };


Line 1,850: Line 2,178:
   struct fence {
   struct fence {
     u32 id;
     u32 id;
     u32 thresh;
     u32 value;
   };
   };
    
    
   struct gpfifo_entry {
   struct gpfifo_entry {
     u64 entry;                               // gpu_iova | (unk_2bits << 40) | (size << 42) | (unk_flag << 63)
     u32 entry0;                             // gpu_iova_lo
    u32 entry1;                              // gpu_iova_hi | (allow_flush << 8) | (is_push_buf << 9) | (size << 10) | (sync << 31)
   };
   };
    
    
Line 1,860: Line 2,189:
     __in    u64 gpfifo;                      // (ignored) pointer to gpfifo fence structs
     __in    u64 gpfifo;                      // (ignored) pointer to gpfifo fence structs
     __in    u32 num_entries;                // number of fence objects being submitted
     __in    u32 num_entries;                // number of fence objects being submitted
     __in   u32 flags;
     union {
      __out u32 detailed_error;
      __in u32 flags;                      // bit0: fence_wait, bit1: fence_get, bit2: hw_format, bit3: sync_fence, bit4: suppress_wfi, bit5: skip_buffer_refcounting
    };
     __inout struct fence fence_out;          // returned new fence object for others to wait on
     __inout struct fence fence_out;          // returned new fence object for others to wait on
     __in    struct gpfifo_entry entries[];  // depends on num_entries
     __in    struct gpfifo_entry entries[];  // depends on num_entries
Line 1,943: Line 2,275:


   struct {
   struct {
     __out u32 error_info[32];   // first word is an error code (0=no_error, 1=gr_error, 2=gr_error, 3=invalid, 4=invalid)
     __out u32 type;     // Error type (0=no_error, 1=mmu_error, 2=gr_error, 3=pbdma_error, 4=timeout)
   };
    __out u32 info[31]; // Infor depends on the error type
   };  


=== NVGPU_IOCTL_CHANNEL_GET_ERROR_NOTIFICATION ===
==== GR Error Code Format ====
Returns the current error notification caught by the error notifier. Exclusive to the Switch.
When <code>type == 2</code> (GR Error), the returned data is formatted as follows:
  struct {
    __out u32 type;      // 2=gr_error
    __out u32 intr_value; // Interrupt bits
    __out u32 addr;      // Register address (in bytes)
    __out u32 data_hi;    // Data high 32 bits
    __out u32 data_lo;    // Data low 32 bits
    __out u32 class_num;  // GPU class number (e.g., 0xb197 for MAXWELL_B)
  };


   struct {
{| class="wikitable"
     __out u64 timestamp;    // fetched straight from armGetSystemTick
|+ GR Error Interrupt Bits
|-
! Bit(s)
! Description
|-
| 0
| GR_INTR_NOTIFY
|-
| 1
| GR_INTR_SEMAPHORE
|-
| 2
| unknown
|-
| 3
| unknown
|-
| 4
| GR_INTR_ILLEGAL_METHOD
|-
| 5
| GR_INTR_ILLEGAL_CLASS
|-
| 6
| GR_INTR_ILLEGAL_NOTIFY
|-
| 7
| unknown
|-
| 8
| GR_INTR_FIRMWARE_METHOD
|-
| 9–18
| unknown
|-
| 19
| GR_INTR_FECS_ERROR
|-
| 20
| GR_INTR_CLASS_ERROR
|-
| 21
| GR_INTR_EXCEPTION
|-
| 22–31
| unknown
|}
 
=== NVGPU_IOCTL_CHANNEL_GET_ERROR_NOTIFICATION ===
Returns the current error notification caught by the error notifier. Exclusive to the Switch.
 
   struct {
     __out u64 timestamp;    // fetched straight from armGetSystemTick
     __out u32 info32;      // error code
     __out u32 info32;      // error code
     __out u16 info16;      // additional error info
     __out u16 info16;      // additional error info
Line 1,961: Line 2,354:
  struct fence {
  struct fence {
     u32 id;
     u32 id;
     u32 thresh;
     u32 value;
  };
  };
   
   
Line 1,967: Line 2,360:
   __in    u32 num_entries;
   __in    u32 num_entries;
   __in    u32 num_jobs;
   __in    u32 num_jobs;
   __in    u32 flags;
   __in    u32 flags;                       // bit0: vpr_enabled
   __out  struct fence fence_out;          // returned new fence object for others to wait on
   __out  struct fence fence_out;          // returned new fence object for others to wait on
   __in    u32 reserved[3];                // ignored
   __in    u32 reserved[3];                // ignored
Line 2,198: Line 2,591:


{| class="wikitable" border="1"
{| class="wikitable" border="1"
|-
|-
! Offset
! Offset
! Size
! Size
! Description
! Description
|-
|-
| 0x0
| 0x0
| 0x4
| 0x4
| FreeSize
| FreeSize
|-
|-
| 0x4
| 0x4
| 0x4
| 0x4
| AllocatableSize
| AllocatableSize
|-
|-
| 0x8
| 0x8
| 0x4
| 0x4
| MinimumFreeSize
| MinimumFreeSize
|-
|-
| 0xC
| 0xC
| 0x4
| 0x4
| MinimumAllocatableSize
| MinimumAllocatableSize
|-
|-
| 0x10
| 0x10
| 0x10
| 0x10
| Reserved
| Reserved
|}
|}
 
= Notes =
In some cases, a panic may occur. NV forces a crash by doing:
(void *)0 = 0xCAFE;
End result is that the system hangs with a white-screen.
 
When the gpfifo data in the gpu_va buffers specified by the submitted gpfifo entries is invalid(?), eventually the user-process will be force-terminated after using the submit-gpfifo ioctl. It's unknown how exactly this is done.


= Notes =
GPU rendering (GPFIFO) is only used by applets/Applications. All sysmodules doing any gfx-display uses software rendering. During system-boot, GPU GPFIFO is not used until the applets are launched.
In some cases, a panic may occur. NV forces a crash by doing:
(void *)0 = 0xCAFE;
End result is that the system hangs with a white-screen.
 
When the gpfifo data in the gpu_va buffers specified by the submitted gpfifo entries is invalid(?), eventually the user-process will be force-terminated after using the submit-gpfifo ioctl. It's unknown how exactly this is done.


[[Category:Services]]
[[Category:Services]]
Retrieved from "https://switchbrew.org/wiki/NV_services"