Gamecard: Difference between revisions
No edit summary |
|||
(15 intermediate revisions by 4 users not shown) | |||
Line 12: | Line 12: | ||
|} | |} | ||
For the Gamecard | For the Gamecard image format, see [[XCI|here]]. | ||
For the Gamecard | For the Gamecard ASIC, see [[Lotus3|here]]. | ||
= Pinout = | |||
Note: Pins 1 and 2 act as one when receiving data from the ASIC chip. | |||
[[File:Gamecard-pinout.png|400px]] | [[File:Gamecard-pinout.png|400px]] | ||
Line 27: | Line 27: | ||
! Description | ! Description | ||
|- | |- | ||
| | | 1 | ||
| CD# | | GND | ||
| Input | |||
| Ground | |||
|- | |||
| 2 | |||
| CD# | |||
| Output | | Output | ||
| Single pin on cartridge side (hardwired to | | Card Detect; Single pin on cartridge side (hardwired to GND). Bridges pin 1 (GND) and 2 (CD#) on slot side as cartridge is inserted | ||
|- | |- | ||
| | | 3 | ||
| CLK | |||
| Input | |||
| Clock, 25MHz | |||
|- | |||
| 4 | |||
| RCLK | | RCLK | ||
| Output | | Output | ||
| Return clock; Game cartridge sends back CLK signal delayed by a few ns | | Return clock; Game cartridge sends back CLK signal delayed by a few ns | ||
|- | |- | ||
| | | 5 | ||
| CS# | | CS# | ||
| Input | | Input | ||
| Chip Select | | Chip Select | ||
|- | |- | ||
| | | 6 | ||
| DAT0 | | DAT1 | ||
| Inout | |||
| Data bus pin 1 | |||
|- | |||
| 7 | |||
| DAT0 | |||
| Inout | | Inout | ||
| Data bus pin 0 | | Data bus pin 0 | ||
|- | |- | ||
| | | 8 | ||
| | | VCC 3.1v | ||
| Input | |||
| Power (3.1V) for Internal Core | |||
|- | |||
| 9 | |||
| DAT3 | |||
| Inout | | Inout | ||
| Data bus pin | | Data bus pin 3 | ||
|- | |||
| 10 | |||
| DAT2 | |||
|- | |||
| | |||
| DAT2 | |||
| Inout | | Inout | ||
| Data bus pin 2 | | Data bus pin 2 | ||
|- | |- | ||
| | | 11 | ||
| VCC 1.8v | |||
| VCC 1.8v | |||
| Input | | Input | ||
| | | Power (1.8V) for I/O | ||
|- | |- | ||
| | | 12 | ||
| DAT5 | | DAT5 | ||
| Inout | | Inout | ||
| Data bus pin 5 | | Data bus pin 5 | ||
|- | |||
| 13 | |||
| DAT4 | |||
| Inout | |||
| Data bus pin 4 | |||
|- | |- | ||
| | | 14 | ||
| DAT6 | | DAT6 | ||
| Inout | | Inout | ||
| Data bus pin 6 | | Data bus pin 6 | ||
|- | |- | ||
| | | 15 | ||
| DAT7 | | DAT7 | ||
| Inout | | Inout | ||
| Data bus pin 7 | | Data bus pin 7 | ||
|- | |- | ||
| | | 16 | ||
| GND | | GND | ||
| | | Input | ||
| | | Ground | ||
|- | |- | ||
| | | 17 | ||
| RST# | | RST# | ||
| Input | | Input | ||
| Reset | | Reset | ||
|- | |- | ||
|} | |} | ||
All IO use 1.8V for logic HIGH and 0V for logic LOW. | All IO use 1.8V for logic HIGH and 0V for logic LOW. | ||
Data pins are approximately 0.75mm in width and are in order of length: 9mm (pin 16), 8mm (pins 17, 5), 6mm (pins 1&2) 3mm (pins 3, 4, 6, 7, 9, 10, 12, 13, 14, 15). | |||
= Slot Pinout = | = Slot Pinout = | ||
[[File:Card_slot.jpg|500px|thumb|right|Annotated slot pinout]] | [[File:Card_slot.jpg|500px|thumb|right|Annotated slot pinout]] | ||
This just maps the [[#Pinout|cartridge pinout]] onto the slot on the console. | |||
{| class="wikitable" | {| class="wikitable" | ||
Line 142: | Line 149: | ||
|- | |- | ||
| 8 | | 8 | ||
| VCC 3. | | VCC 3.1v | ||
|- | |- | ||
| 9 | | 9 | ||
Line 185: | Line 192: | ||
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes. | The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes. | ||
= Manufacturers = | = Manufacturers = | ||
;Macronix | ;MegaChips (outsourced to Macronix) | ||
: Uses package: LGA, TSOP-48 | : Uses package: LGA, TSOP-48 | ||
: Uses card id: 0xC2 | : Uses card id: 0xC2 | ||
; | |||
;Lapis | |||
: Uses package: LGA, TSOP-48 | : Uses package: LGA, TSOP-48 | ||
: Uses card id: | : Uses card id: 0xAE | ||
; | |||
: Uses package: | ;LSI Logic (?) | ||
: Uses card id: | : Uses package: LGA | ||
: Uses card id: 0x36 |