Thread Local Region - Revision history

Alu at 00:25, 19 March 2026

2026-03-18T23:25:17Z

2026-02-11T18:12:20Z

add 21.0.0 TLS changes

2024-09-05T18:23:03Z

2023-09-11T15:49:51Z

← Older revision		Revision as of 19:49, 11 September 2023
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	This is the 0x200-byte thread local region. ~~It's~~ base address is loaded via ARM threadid register tpidrro_el0. TLR for multiple threads are stored in the same page, with the first TLR normally located at page+0x200, because the first TLR spot is reserved for usermode exception handling.		This is the 0x200-byte thread local region. Its base address is loaded via ARM threadid register tpidrro_el0. TLR for multiple threads are stored in the same page, with the first TLR normally located at page+0x200, because the first TLR spot is reserved for usermode exception handling. In threads created by sdk, tpidr_el0 is assigned to the ThreadPointer object from the thread local region.

	= Structure =		= Structure =

2020-09-03T17:05:09Z

2020-09-03T16:23:44Z

← Older revision		Revision as of 20:23, 3 September 2020
(No difference)

2020-07-24T21:08:58Z

better disable count/interrupt flag notes

← Older revision		Revision as of 01:08, 25 July 2020
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	! Size		! Size
	! Description		! Description
			! Notes
	\|-		\|-
	\| 0x0		\| 0x0
	\| 0x100		\| 0x100
	\| [[IPC_Marshalling\|IPC]] command buffer.		\| [[IPC_Marshalling\|IPC]] command buffer.
			\|
	\|-		\|-
	\| [8.0.0+] 0x100		\| [8.0.0+] 0x100
	\| ~~0x4~~		\| 0x2
	\| ~~Preemption State~~		\| User Disable Count
			\| If userland sets this to non-zero, kernel will pin the thread and disallow calls to almost all SVCs.
			\|-
			\| [8.0.0+] 0x102
			\| 0x2
			\| Interrupt Flag
			\| If a context switch would have occurred when user disable count was non-zero, kernel will set this to 1. This signifies that the user must call [[SVC#SynchronizePreemptionState\|SynchronizePreemptionState]] to unpin itself and regain access other SVCs.
	\|-		\|-
	\| 0x104		\| 0x104
	\| 0xF4		\| 0xF4
	\| Unknown.		\| Unknown.
			\|
	\|-		\|-
	\| 0x1F8		\| 0x1F8
	\| 0x8		\| 0x8
	\| Pointer to [[Thread_Local_Storage#Thread_context\|thread context]].		\| Pointer to [[Thread_Local_Storage#Thread_context\|thread context]].
			\|
	\|}		\|}

2019-06-06T12:16:36Z

← Older revision		Revision as of 16:16, 6 June 2019
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	\| 0x88		\| 0x88
	\| 0x100		\| 0x100
	\| ~~Initially empty (contains unknown pointers)~~.		\| TLS slots.
	\|-		\|-
	\| 0x188		\| 0x188

2019-04-22T08:06:14Z

I can't math

2019-04-22T08:02:48Z

Mention preemption state

← Older revision		Revision as of 12:02, 22 April 2019
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	\| [[IPC_Marshalling\|IPC]] command buffer.		\| [[IPC_Marshalling\|IPC]] command buffer.
	\|-		\|-
	\| 0x100		\| [8.0.0+] 0x100
	\| ~~0xF8~~		\| 0x4
			\| Preemption State
			\|-
			\| 0x108
			\| 0xF4
	\| Unknown.		\| Unknown.
	\|-		\|-