TSEC Firmware - Revision history

Shchmue: /* Main */ correct secureboot falcon os address memcpy source

2021-11-23T00:56:58Z

Main: correct secureboot falcon os address memcpy source

← Older revision		Revision as of 03:56, 23 November 2021
Line 1,192:		Line 1,192:
	// Read the SecureBoot blob's Falcon OS image from memory		// Read the SecureBoot blob's Falcon OS image from memory
	u32 blob4_flcn_os_addr = ((((blob0_size + blob1_size) + 0x100) + blob2_size) + flcn_code_hdr_size);		u32 blob4_flcn_os_addr = ((((blob0_size + blob1_size) + 0x100) + blob2_size) + flcn_code_hdr_size);
	memcpy_i2d(boot_base_addr, ~~blob4_flcn_os_hdr_addr~~, flcn_os_size);		memcpy_i2d(boot_base_addr, blob4_flcn_os_addr, flcn_os_size);

	// Upload the SecureBoot's Falcon OS image boot stub code segment into Falcon's CODE region		// Upload the SecureBoot's Falcon OS image boot stub code segment into Falcon's CODE region

Vale: Fix FALCON_HWCFG MMIO names

2020-09-05T17:33:14Z

Fix FALCON_HWCFG MMIO names

← Older revision		Revision as of 21:33, 5 September 2020
Line 230:		Line 230:
	<pre>		<pre>
	// Read data segment size from IO space		// Read data segment size from IO space
	u32 data_seg_size = (u32 )~~UC_CAPS~~;		u32 data_seg_size = (u32 )FALCON_HWCFG;
	data_seg_size >>= 0x09;		data_seg_size >>= 0x09;
	data_seg_size &= 0x1FF;		data_seg_size &= 0x1FF;
Line 496:		Line 496:

	// Read data segment size from IO space		// Read data segment size from IO space
	u32 data_seg_size = (u32 )~~UC_CAPS~~;		u32 data_seg_size = (u32 )FALCON_HWCFG;
	data_seg_size >>= 0x09;		data_seg_size >>= 0x09;
	data_seg_size &= 0x1FF;		data_seg_size &= 0x1FF;
Line 695:		Line 695:
	// Swap halves (b16, b32 and b16 again) and store it as the last word		// Swap halves (b16, b32 and b16 again) and store it as the last word
	(u32 )(buf + 0x0C) = (		(u32 )(buf + 0x0C) = (
	((size & 0x000000FF) << 0x08 \| (size & 0x0000FF00) >> 0x08) << 0x10		((size & 0x000000FF) << 0x08
			\| (size & 0x0000FF00) >> 0x08) << 0x10
	\| ((size & 0x00FF0000) >> 0x10) << 0x08		\| ((size & 0x00FF0000) >> 0x10) << 0x08
	\| (size & 0xFF000000) >> 0x18		\| (size & 0xFF000000) >> 0x18
Line 960:		Line 961:
	The main function takes '''key_addr''' and '''key_type''' as arguments from [[#KeygenLdr\|KeygenLdr]].		The main function takes '''key_addr''' and '''key_type''' as arguments from [[#KeygenLdr\|KeygenLdr]].
	<pre>		<pre>
	u32 falcon_rev = (u32 )~~UC_CAPS2~~ & 0x0F;		u32 falcon_rev = (u32 )FALCON_HWCFG2 & 0x0F;

	// Falcon hardware revision must be 5		// Falcon hardware revision must be 5
Line 1,261:		Line 1,262:
	<pre>		<pre>
	// Read data segment size from IO space		// Read data segment size from IO space
	u32 data_seg_size = (u32 )~~UC_CAPS~~;		u32 data_seg_size = (u32 )FALCON_HWCFG;
	data_seg_size >>= 0x01;		data_seg_size >>= 0x01;
	data_seg_size &= 0xFF00;		data_seg_size &= 0xFF00;
Line 1,387:		Line 1,388:

	// Read data segment size from IO space		// Read data segment size from IO space
	u32 data_seg_size = (u32 )~~UC_CAPS~~;		u32 data_seg_size = (u32 )FALCON_HWCFG;
	data_seg_size >>= 0x01;		data_seg_size >>= 0x01;
	data_seg_size &= 0xFF00;		data_seg_size &= 0xFF00;
Line 1,519:		Line 1,520:

	// Read data segment size from IO space		// Read data segment size from IO space
	u32 data_seg_size = (u32 )~~UC_CAPS~~;		u32 data_seg_size = (u32 )FALCON_HWCFG;
	data_seg_size >>= 0x01;		data_seg_size >>= 0x01;
	data_seg_size &= 0xFF00;		data_seg_size &= 0xFF00;

Vale at 21:08, 19 August 2020

2020-08-19T19:08:14Z

← Older revision		Revision as of 23:08, 19 August 2020
Line 735:		Line 735:

	===== crypto_load =====		===== crypto_load =====
	This method takes '''reg''' (a crypto register) and '''buf''' (a 16 bytes buffer) as arguments and loads the supplied ~~buffer~~ into the ~~crypto register~~.		This method takes '''reg''' (a crypto register) and '''buf''' (a 16 bytes buffer) as arguments and loads the contents of the supplied register into the supplied buffer.
	<pre>		<pre>
	// The next two xfer instructions will be overridden		// The next two xfer instructions will be overridden

Vale at 20:11, 19 August 2020

2020-08-19T18:11:55Z

Show changes

Hexkyz: /* exec_secboot */

2019-06-28T16:48:36Z

exec_secboot

← Older revision		Revision as of 20:48, 28 June 2019
Line 1,860:		Line 1,860:
	return;		return;
	</pre>		</pre>

			[8.1.0+] Key derivation algorithm was changed. Very minor changes were introduced to mitigate and prevent attacks.

	== Key data ==		== Key data ==

Hexkyz: /* SecureBoot */

2019-06-28T16:40:58Z

SecureBoot

@@ Line 1,281: / Line 1,281: @@
      $flags.ie0 = 0;
      $flags.ie1 = 0;
      // Jump to the SecureBoot blob's Falcon OS image

Hexkyz at 19:26, 21 February 2019

2019-02-21T18:26:31Z

Show changes

Hexkyz at 18:55, 21 February 2019

2019-02-21T17:55:28Z

← Older revision		Revision as of 20:55, 21 February 2019
Line 1,289:		Line 1,289:

	==== exec_secboot ====		==== exec_secboot ====
			This is the signed and encrypted portion of the [[#SecureBoot\|SecureBoot]] payload.
			<pre>
			// Recover the transfer base address from the stack
			u32 xfer_ext_base_addr = (u32 )scratch_data_addr;

			// Return the TLB entry that covers the virtual address
			u32 tlb_entry = vtlb(xfer_ext_base_addr);

			// Clear Falcon CPU control
			(u32 )FALCON_CPUCTL = 0;

			// Halt if the external page is marked as secret
			if ((tlb_entry & 0x4000000) != 0)
			exit();

			// Read data segment size from IO space
			u32 data_seg_size = (u32 )FALCON_HWCFG;
			data_seg_size >>= 0x01;
			data_seg_size &= 0xFF00;

			// Set the stack pointer
			$sp = data_seg_size;

			// Fill all DMEM with a pointer to a trap function (just exits 3 times)
			for (int i = 0; i < data_seg_size; i += 0x04) {
			(u32 )i = (u32)trap_func();
			}

			// Initialize the TRNG and generate random data in DMEM
			init_rnd();

			// Issue a randomized delay and return a random value
			u32 rnd_val = rnd_delay(0xFF);

			// Load the TSEC key from SOR1 registers into DMEM
			sor1_get_key();

			// Initialize CAR registers
			car_init();

			// Check certain CAR, PMC and FUSE registers
			test_car_pmc_fuse();

			// Ensure CLK_RST_CONTROLLER_CLK_SOURCE_TSEC_0 is 0x02
			test_clk_source_tsec();

			// Set FLOW_MODE_WAITEVENT in FLOW_CTLR_HALT_COP_EVENTS_0
			halt_bpmp();

			// Initialize the CCPLEX
			ccplex_init();

			// Check certain CAR, PMC and FUSE registers
			test_car_pmc_fuse();

			bool is_se_ready = false;

			// Wait for SE to be ready
			while (!is_se_ready)
			is_se_ready = check_se_status();

			// Test MC_IRAM_BOM and MC_IRAM_TOM
			u32 mc_iram_aperture_res = test_mc_iram_aperture();

			if (mc_iram_aperture_res != 0xAAAAAAAA)
			{
			// Clear the entire DMEM region
			clear_dmem();

			// Halt 5 times for no good reason
			exit();
			exit();
			exit();
			exit();
			exit();
			}

			// Ensure FUSE_SKU_INFO is 0x83
			test_fuse_sku_info();

			// Write TSEC key to SE keyslot 0x0C
			se_set_keyslot_12();

			// Write TSEC root key to SE keyslot 0x0D
			se_set_keyslot_13();

			// Decrypt Package1
			decrypt_pk11();

			// Check certain CAR, PMC and FUSE registers
			test_car_pmc_fuse();

			// Parse Package1 header and return entry address
			u32 entry_addr = parse_pk11();

			// Set the exception vectors
			set_excp_vec(entry_addr);

			// Fill the top 0x500 bytes in DMEM with a pointer to trap function (just exits)
			for (int i = 0; i < 0x500; i += 0x04) {
			(u32 )i = (u32)trap_func();
			}

			// Clear all crypto registers
			cxor($c0, $c0);
			cxor($c1, $c1);
			cxor($c2, $c2);
			cxor($c3, $c3);
			cxor($c4, $c4);
			cxor($c5, $c5);
			cxor($c6, $c6);
			cxor($c7, $c7);

			// Take SCP out of lockdown
			unlock_scp();

			// Clear FLOW_CTLR_HALT_COP_EVENTS_0
			resume_bpmp();

			// Clear the entire DMEM region
			clear_dmem();

			// Halt 5 times for no good reason
			exit();
			exit();
			exit();
			exit();
			exit();

			return;
			</pre>

			[7.0.0+]

	== Key data ==		== Key data ==

Hexkyz at 17:31, 21 February 2019

2019-02-21T16:31:22Z

@@ Line 959: / Line 959: @@
      cxor($c6, $c6);
      cxor($c7, $c7);
      return;

Hexkyz at 17:13, 21 February 2019

2019-02-21T16:13:00Z

Show changes