GPU Classes - Revision history

Hexkyz: Official name

2024-05-04T17:53:58Z

Official name

← Older revision		Revision as of 21:53, 4 May 2024
Line 693:		Line 693:
	\| 0x451 \|\| FlushPendingWrites \|\| 1 \|\| \|\|		\| 0x451 \|\| FlushPendingWrites \|\| 1 \|\| \|\|
	\|-		\|-
	\| 0x452 \|\| ~~RasterEnable~~ \|\| 1 \|\| bool \|\|		\| 0x452 \|\| SetConservativeRaster \|\| 1 \|\| bool \|\|
	\|- style="border-top: double"		\|- style="border-top: double"
	\| 0x458+N \|\| SetVertexAttributeA \|\| 4 \|\| bitfield[16] \|\| Bit0-4: StreamIndex, bit7-20: Format0, bit21-30: Format1		\| 0x458+N \|\| SetVertexAttributeA \|\| 4 \|\| bitfield[16] \|\| Bit0-4: StreamIndex, bit7-20: Format0, bit21-30: Format1

Hexkyz at 19:03, 24 September 2022

2022-09-24T17:03:53Z

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Hexkyz: /* FERMI_TWOD_A */

2022-08-11T18:35:46Z

FERMI_TWOD_A

← Older revision		Revision as of 22:35, 11 August 2022
Line 1,975:		Line 1,975:
	\| 0xD00 \|\| SetMmeShadowScratch \|\| uint[0x100] \|\| 256 \|\| Mostly general purpose, sometimes accessed by FirmwareCall.		\| 0xD00 \|\| SetMmeShadowScratch \|\| uint[0x100] \|\| 256 \|\| Mostly general purpose, sometimes accessed by FirmwareCall.
	\|- style="border-top: double"		\|- style="border-top: double"
	\| 0xE00+N*2 \|\| ~~CallMmeMacroN~~ \|\| 1 \|\| uint \|\| n=0..0x7f. Writing here calls a bound macro with value written put in r1.		\| 0xE00+N*2 \|\| CallMmeMacro \|\| 1 \|\| uint \|\| n=0..0x7f. Writing here calls a bound macro with value written put in r1.
	\|-		\|-
	\| 0xE01+N*2 \|\| ~~CallMmeDataN~~ \|\| 1 \|\| pipe \|\| Used to send variable number of arguments to macro via the "parm" instruction.		\| 0xE01+N*2 \|\| CallMmeData \|\| 1 \|\| pipe \|\| Used to send variable number of arguments to macro via the "parm" instruction.
	\|}		\|}

Hexkyz at 20:33, 11 August 2022

2022-08-11T18:33:30Z

@@ Line 12: / Line 12: @@
 | 0xB0B5 || 4 || [[#MAXWELL_DMA_COPY_A|MAXWELL_DMA_COPY_A]]
 |-
-| 0xB06F || - || MAXWELL_CHANNEL_GPFIFO_A
+| 0xB06F || - || [[#MAXWELL_CHANNEL_GPFIFO_A|MAXWELL_CHANNEL_GPFIFO_A]]
 |}
@@ Line 19: / Line 19: @@
 ! Register || Name || Size || Type || Notes
 |-
-| 0 || SetObject || 1 || bitfield || Bit0-15: ClassId, bit16-20: EngineId
+| 0x0 || SetObject || 1 || bitfield || Bit0-15: ClassId, bit16-20: EngineId
 |- style="border-top: double"
 | 0x40 || NoOperation || 1 || ||
@@ Line 1,254: / Line 1,254: @@
 ! Register || Name || Size || Type || Notes
 |-
-| 0 || SetObject || 1 || bitfield || Bit0-15: ClassId, bit16-20: EngineId
+| 0x0 || SetObject || 1 || bitfield || Bit0-15: ClassId, bit16-20: EngineId
 |- style="border-top: double"
 | 0x40 || NoOperation || 1 || ||
@@ Line 1,621: / Line 1,621: @@
 ! Register || Name || Size || Type || Notes
 |-
-| 0 || SetObject || 1 || bitfield || Bit0-15: ClassId, bit16-20: EngineId
+| 0x0 || SetObject || 1 || bitfield || Bit0-15: ClassId, bit16-20: EngineId
 |- style="border-top: double"
 | 0x40 || NoOperation || 1 || ||
@@ Line 2,053: / Line 2,053: @@
 |- style="border-top: double"
 | 0x445 || PmTriggerEnd || 1 || ||
 |}

Hexkyz at 20:02, 11 August 2022

2022-08-11T18:02:26Z

Show changes

Hexkyz at 21:31, 9 August 2022

2022-08-09T19:31:53Z

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Hexkyz at 21:10, 8 August 2022

2022-08-08T19:10:55Z

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Hexkyz at 19:49, 14 February 2022

2022-02-14T18:49:06Z

← Older revision		Revision as of 21:49, 14 February 2022
Line 11:		Line 11:
	\|-		\|-
	\| 0xB0B5 \|\| 4 \|\| [[#MAXWELL_DMA_COPY_A\|MAXWELL_DMA_COPY_A]]		\| 0xB0B5 \|\| 4 \|\| [[#MAXWELL_DMA_COPY_A\|MAXWELL_DMA_COPY_A]]
			\|-
			\| 0xB06F \|\| - \|\| MAXWELL_CHANNEL_GPFIFO_A
	\|}		\|}

Hexkyz at 18:56, 14 February 2022

2022-02-14T17:56:50Z

← Older revision		Revision as of 20:56, 14 February 2022
Line 2:		Line 2:
	! Id \|\| Subchannel (nvn) \|\| Name		! Id \|\| Subchannel (nvn) \|\| Name
	\|-		\|-
	\| 0xB197 \|\| 0 \|\| [[#3D\|3D]]		\| 0xB197 \|\| 0 \|\| [[#MAXWELL_B\|MAXWELL_B]]
	\|-		\|-
	\| 0xB1C0 \|\| 1 \|\| [[#~~Compute~~\|~~Compute~~]]		\| 0xB1C0 \|\| 1 \|\| [[#MAXWELL_COMPUTE_B\|MAXWELL_COMPUTE_B]]
	\|-		\|-
	\| 0xA140 \|\| 2 \|\| ~~Inline-to-Memory~~		\| 0xA140 \|\| 2 \|\| KEPLER_INLINE_TO_MEMORY_B
	\|-		\|-
	\| 0x902D \|\| 3 \|\| [[#2D\|2D]]		\| 0x902D \|\| 3 \|\| [[#FERMI_TWOD_A\|FERMI_TWOD_A]]
	\|-		\|-
	\| 0xB0B5 \|\| 4 \|\| [[#~~DMA~~\|~~DMA~~]]		\| 0xB0B5 \|\| 4 \|\| [[#MAXWELL_DMA_COPY_A\|MAXWELL_DMA_COPY_A]]
	\|}		\|}

	= 3D =		= MAXWELL_B =
	{\| class=wikitable		{\| class=wikitable
	! Register \|\| Name \|\| Size \|\| Type \|\| Notes		! Register \|\| Name \|\| Size \|\| Type \|\| Notes
Line 456:		Line 456:
	TODO: (Tiled)Downsample, Copy, Dispatch, DrawTexture/DrawTransformFeedback, BindImages, BindProgram, BindSeprarateSamplers, BindSeprarateTextures, BindTextures.		TODO: (Tiled)Downsample, Copy, Dispatch, DrawTexture/DrawTransformFeedback, BindImages, BindProgram, BindSeprarateSamplers, BindSeprarateTextures, BindTextures.

	= ~~Compute~~ =		= MAXWELL_COMPUTE_B =
	{\| class=wikitable		{\| class=wikitable
	! Register \|\| Name \|\| Size \|\| Type \|\| Notes		! Register \|\| Name \|\| Size \|\| Type \|\| Notes
Line 823:		Line 823:
	\|}		\|}

	= 2D =		= FERMI_TWOD_A =
	{\| class=wikitable		{\| class=wikitable
	! Register \|\| Name \|\| Size \|\| Type \|\| Notes		! Register \|\| Name \|\| Size \|\| Type \|\| Notes
Line 1,186:		Line 1,186:
	\|}		\|}

	= ~~DMA~~ =		= MAXWELL_DMA_COPY_A =
	{\| class=wikitable		{\| class=wikitable
	! Register \|\| Name \|\| Size \|\| Type \|\| Notes		! Register \|\| Name \|\| Size \|\| Type \|\| Notes

Hexkyz at 18:52, 14 February 2022

2022-02-14T17:52:19Z

← Older revision		Revision as of 20:52, 14 February 2022
Line 1:		Line 1:
	~~Subchannels:~~
	{\| class=wikitable		{\| class=wikitable
	! Id \|\| Subchannel (nvn) \|\| Name		! Id \|\| Subchannel (nvn) \|\| Name